Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
7. I/O Ports
7.4.20
Port P11 Drive Capacity Control Register (P11DRR)
Address 01F1h
Bit
b7
b6
b5
b4
b3
b2
b1
b0
Symbol P11DRR7 P11DRR6 P11DRR5 P11DRR4 P11DRR3 P11DRR2 P11DRR1 P11DRR0
After Reset
0
0
0
0
0
0
0
0
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Symbol
P11DRR0
P11DRR1
P11DRR2
P11DRR3
P11DRR4
P11DRR5
P11DRR6
P11DRR7
Bit Name
P11_0 drive capacity
P11_1 drive capacity
P11_2 drive capacity
P11_3 drive capacity
P11_4 drive capacity
P11_5 drive capacity
P11_6 drive capacity
P11_7 drive capacity
Function
0: Low
1: High
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Note:
1. Both high-level output and low-level output are set to high drive capacity.
The P11DRR register selects whether the drive capacity of the P11 output transistor is set to low or high. The
P11DRRi bit (i = 0 to 7) is used to select whether the drive capacity of the output transistor is set to low or high
for each pin.
7.4.21
Input Threshold Control Register 0 (VLT0)
b6
0
b5
0
b4
0
b3
0
b2
0
b1
0
Function
b1 b0
Address 01F5h
Bit
b7
Symbol VLT07
After Reset
0
Bit
b0
b1
b0
0
R/W
R/W
R/W
Symbol
Bit Name
VLT00 P0 input level select bit
VLT01
0 0: 0.50 × VCC
0 1: 0.35 × VCC
1 0: 0.70 × VCC
1 1: Do not set.
b3 b2
b2
b3
VLT02
VLT03
P1 input level select bit
0 0: 0.50 × VCC
0 1: 0.35 × VCC
1 0: 0.70 × VCC
1 1: Do not set.
b5 b4
R/W
R/W
b4
b5
VLT04
VLT05
P2 input level select bit
0 0: 0.50 × VCC
0 1: 0.35 × VCC
1 0: 0.70 × VCC
1 1: Do not set.
b7 b6
R/W
R/W
b6
b7
VLT06
VLT07
P3 input level select bit
0 0: 0.50 × VCC
0 1: 0.35 × VCC
1 0: 0.70 × VCC
1 1: Do not set.
R/W
R/W
The VLT0 register selects the voltage level of the input threshold values for ports P0 to P3. Bits VLT00 to
VLT07 are used to select the input threshold values among three voltage levels (0.35 VCC, 0.50 VCC, and 0.70
VCC).
REJ09B0441-0010 Rev.0.10
Page 101 of 809
Jul 30, 2008
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