R5F2L387BNFP 参数 Datasheet PDF下载

Under development

Preliminary specification

Specifications in this manual are tentative and subject to change.

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

7. I/O Ports

7.1

I/O Port Functions

The PDi_j (j = 0 to 7) bit in the PDi (i = 0 to 7, 10 to 13) register controls the input/output of ports P0 to P7 and P10

to P13. The Pi register consists of a port latch to retain output data and a circuit to read the pin status.

Figures 7.1 to 7.4 show the I/O Port Configurations, and Table 7.3 lists the I/O Port Functions.

Table 7.3

I/O Port Functions

Operation When

Value of PDi_j Bit in PDi Register

Accessing

When PDi_j Bit is Set to 0 (Input Mode) When PDi_j Bit is Set to 1 (Output Mode)

Pi Register

Read

Read the pin input level.

Read the port latch.

Write to the port latch. The value written to

Write

Write to the port latch.

the port latch is output from the pin.

Note:

1. i = 0 to 7, 10 to 13; j = 0 to 7

7.2

Effect on Peripheral Functions

I/O ports function as I/O ports for peripheral functions (refer to

Tables 1.15 to 1.17 Pin Name Information by Pin

Number).

Table 7.4

Setting of PDi_j Bit when Functioning as I/O Ports for Peripheral Functions

(i = 0 to 7, 10 to 13; j = 0 to 7)

I/O of Peripheral Function

PDi_j Bit Settings for Shared Pin Function

Input

Set this bit to 0 (input mode).

Output

This bit can be set to either 0 or 1 (output regardless of the port setting).

7.3

Pins Other than I/O Ports

REJ09B0441-0010 Rev.0.10

Page 79 of 809

Jul 30, 2008