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R5F2L387BNFP 参数 Datasheet PDF下载

R5F2L387BNFP图片预览
型号: R5F2L387BNFP
PDF下载: 下载PDF文件 查看货源
内容描述: 瑞萨MCU R8C族/ R8C / Lx系列 [RENESAS MCU R8C FAMILY / R8C/Lx SERIES]
分类和应用:
文件页数/大小: 848 页 / 11228 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
6. Voltage Detection Circuit
6.2.9
Option Function Select Register (OFS)
b6
LVDAS
1
b5
b4
b3
b2
VDSEL1 VDSEL0 ROMCP1 ROMCR
1
1
1
1
b1
1
b0
WDTON
1
(Note 1)
R/W
R/W
R/W
R/W
R/W
Address 0FFFFh
Bit
b7
Symbol CSPROINI
When shipping
1
Bit
b0
b1
b2
b3
b4
b5
Symbol
Bit Name
WDTON Watchdog timer start select bit
Reserved bit
ROMCR ROM code protect disable bit
ROMCP1 ROM code protect bit
VDSEL0 Voltage detection 0 level select bit
(2)
VDSEL1
Function
0: Watchdog timer automatically starts after reset
1: Watchdog timer is stopped after reset
Set to 1.
0: ROM code protect disabled
1: ROMCP1 bit enabled
0: ROM code protect enabled
1: ROM code protect disabled
b5 b4
b6
b7
LVDAS
Voltage detection 0 circuit start bit
(3)
CSPROINI Count source protection mode
after reset select bit
R/W
0 0: 3.80 V selected (Vdet0_3)
R/W
0 1: 2.85 V selected (Vdet0_2)
1 0: 2.35 V selected (Vdet0_1)
1 1: 1.90 V selected (Vdet0_0)
0: Voltage monitor 0 reset enabled after reset
R/W
1: Voltage monitor 0 reset disabled after reset
0: Count source protection mode enabled after reset R/W
1: Count source protection mode disabled after reset
Notes:
1. If the block including the OFS register is erased, the OFS register value is set to FFh.
2. The same level of the voltage detection 0 level selected by bits VDSEL0 and VDESL1 is set in both functions of
voltage monitor 0 reset and power-on reset.
3. To use power-on reset, set the LVDAS bit to 0 (voltage monitor 0 reset enabled after reset).
The OFS register is allocated in the flash memory. Write to this register with a program.
After writing, do not write additions to this register.
LVDAS Bit (Voltage Detection 0 Circuit Start Bit)
The Vdet0 voltage to be monitored by the voltage detection 0 circuit is selected by bits VDSEL0 and VDSEL1.
REJ09B0441-0010 Rev.0.10
Page 71 of 809
Jul 30, 2008