R8C/13 Group
6.4 Power Control
Figure 6.6 shows the state transition of power control.
Reset
Low-speed On-chip
Oscillator Mode
OCD2=1
HR01=0
,
=0
CM14=0
01
There are six power control modes.
(1) High-speed mode
(2) Middle-speed mode
(3) High-speed on-chip oscillator mode
(4) Low-speed on-chip oscillator mode
(5) Wait mode
, HR
1
5=0,
0
0
14= 2=
D
C
M
, CM
C
0
O
3=1
1
D2=
M
C
High-speed Mode,
Middle-speed mode
OCD2=0
C
O
(6) Stop mode
CM05=0
CM13=1
HR00
OCD2=1
=1, HR01=1
CM1
OCD2=0
3=1, CM05=0,
,
High-speed On-chip
Oscillator Mode
OCD2=1
CM05: Bit in CM0 register
CM10, CM13, CM14: Bit in CM1 register
OCD2: Bit in OCD register
HR01=1
HR00, HR01: Bit in HR0 register
HR00=1
Interrupt
WAIT Instruction
Interrupt
CM10=1
(All clocks stop)
Wait Mode
Stop Mode
Figure 6.6 State Transition of Power Control
Rev.1.20 Jan 27, 2006 page 41 of 205
REJ09B0111-0120