M66282FP
Absolute Maximum Ratings
(Ta = 0 to 70°C, unless otherwise noted)
Item
Supply voltage
Input voltage
Output voltage
Power dissipation
Storage temperature
Symbol
V
CC
V
I
V
O
Pd
Tstg
Ratings
−0.3
to +4.6
−0.3
to V
CC
+ 0.3
−0
3 to V
CC
+ 0 3
300
−55
to 150
Unit
V
V
V
mW
°C
Conditions
Value based on the GND pin
Recommended Operating Conditions
Item
Supply voltage
Supply voltage
Operating temperature
Symbol
V
CC
GND
Topr
Min
2.7
0
Typ
3.15
0
Max
3.6
70
Unit
V
V
°C
Electrical Characteristics
(Ta = 0 to 70°C, V
CC
= 2.7 to 3.6 V, GND = 0 V, unless otherwise noted)
Item
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
High-level input current
Symbol
V
IH
V
IL
V
OH
V
OL
I
IH
Min
2.0
V
CC
−
0.4
Typ
Max
0.8
0.4
1.0
Unit
V
V
V
V
µA
I
OH
=
−4
mA
I
OL
= 4 mA
V
I
= V
CC
WEB, WRESB, WCK,
REB, RRESB, RCK,
D0 to D7
WEB, WRESB, WCK,
REB, RRESB, RCK,
D0 to D7
Test Conditions
Low-level input current
I
IL
−1.0
µA
V
I
= GND
Off-state high-level output current
Off-state low-level output current
Average supply current during
operation
Input capacitance
Off-time output capacitance
l
OZH
I
OZL
I
CC
C
I
C
O
5.0
−5.0
70
10
15
µA
µA
mA
pF
pF
Vo = V
CC
Vo = GND
V
I
= V
CC
, GND, Output open
t
WCK
, t
RCK
= 25 ns
f = 1 MHz
f = 1 MHz
Function
When write enable input WEB is set to "L", the contents of data inputs D0 to D7 are read in synchronization with a
rising edge of write clock input WCK to perform writing operation. When this is the case, the write address counter is
also incremented simultaneously.
When WEB is set to "H", the writing operation is inhibited and the write address counter stops.
When write reset input WRESB is set to "L", the write address counter is initialized.
When read enable input REB is set to "L", the contents of memory are output to data outputs Q0 to Q7 in
synchronization with a rising edge of read clock input RCK to perform reading operation. When this is the case, the
read address counter is incremented simultaneously.
When REB is set to "H", the reading operation is inhibited and the read address counter stops. The outputs are placed
in a high impedance state.
When read reset input RRESB is set to "L", the read address counter is initialized.
REJ03F0255-0200 Rev.2.00 Sep 14, 2007
Page 3 of 13
RENESAS [ RENESAS TECHNOLOGY CORP ]
