M61538FP
Clock and Data Timings
(D0 ~ D15)
DATA
LATCH
t
cr
75%
25%
tSLD
75%
50%
25%
CLOCK
tHLD tSHD
tHHD
tSLD
tHLD
tr
tWHC
tf
tWLC
Timing Definition of Digital Block
Limits
Parameter
CLOCK cycle time
CLOCK pulse width (“H” level)
CLOCK pulse width (“L” level)
Rising time of clock and data
Falling time of clock and data
DATA setup time (Rising time of clock)
DATA setup time (Falling time of clock)
DATA hold time (“H” level)
DATA hold time (“L” level)
Symbol
tcr
tWHC
tWLC
tr
tf
tSHD
tSLD
tHHD
tHLD
Min
8
3.2
3.2
—
—
1.6
1.6
1.6
1.6
Typ
—
—
—
—
—
—
—
—
—
Max
—
—
—
0.8
0.8
—
—
—
—
µs
Units
Rev.1.0, Mar.23.2004, page 5 of 11