M61538FP
Recommended Operating Conditions
(Ta = 25°C, unless otherwise noted)
Limits
Parameter
Analog supply voltage (Positive)
Analog supply voltage (Negative)
Analog supply voltage
Symbol
VCC
VEE
VCC
Min
4.5
–7.5
9
2.7
4.5
DVDD
×0.7
DGND
Typ
7
–7
10
5
5
—
—
Max
7.5
–4.5
12
5.5
5.5
DVDD
DVDD
×0.3
Units
V
V
V
V
V
V
V
Conditions
±Power
supplies used
±Power
supplies used
Single power supply used
±Power
supplies used,
DGND = 0V
Single power supply used,
DGND = 0V
DGND = 0V
DGND = 0V
Digital supply voltage
VDD
Logic “H” level input voltage
Logic “L” level input voltage
VIH
VIL
Notes: 1. VEE
≤
DGND < DVDD
≤
VCC
2. Apply VCC, VEE and DVDD at the same time.
Relationship between Data and Clock
Data signal is read at the rising edge of CLOCK.
Make "H" at the timing which
DATA of D0-D15 make latch.
DATA
D0
D1
D2
D3
D13
D14
D15
CLOCK
When DATA is "H", latch signal is
created at the falling edge of CLOCK.
Rev.1.0, Mar.23.2004, page 4 of 11
RENESAS [ RENESAS TECHNOLOGY CORP ]
