MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Data write and data read are performed in the same way as for timer
be set to “1” and bits 1, 2, 3, and 5 must be “0”. Bits 6 and 7 are ig-
nored. Note that bits 5, 6, and 7 of the up-down register (4416) are
the two-phase pulse signal processing select bits for timers A2, A3
and A4 respectively. Each timer operates in normal event counter
mode when the corresponding bit is “0” and performs two-phase
pulse signal processing when it is “1”.
mode. That is, when data is written to timerAi halted, it is also written
to the reload register and the counter. When data is written to timer
Ai which is busy, the data is written to the reload register, but not to
the counter. The counter is reloaded with new data from the reload
register at the next reload time. The counter can be read at any time.
Count is started by setting the count start bit to “1”. Data write and
read are performed in the same way as for normal event counter
mode. Note that the direction register of the input port must be set to
input mode because two kinds of pulse signals, described above, are
input. Also, there can be no pulse output in this mode.
Two-phase pulse processing
In event counter mode, whether to increment or decrement the
counter can also be determined by supplying two kinds of pulses of
which phases differ by 90° to timer A2, A3, orA4. There are two types
of two-phase pulse processing operations. One uses timers A2 and
A3, and the other uses timer A4. In both processing operations, two
pulses described above are input to the TAjOUT (j = 2 to 4) pin and
TAjIN pin respectively.
Addresses
Timer A2 mode register
Timer A3 mode register
Timer A4 mode register
5816
5916
5A16
When timers A2 and A3 are used, as shown in Figure 25, the count is
incremented when a rising edge is input to the TAkIN pin after the
level of TAkOUT(k=2,3) pin changes from “L” to “H”, and when the fall-
ing edge is input, the count is decremented.
7
×
6
×
5
0
4
1
3
0
2
0
1
0
0
1
0 1 : Always “01” in event counter mode
For timerA4, as shown in Figure 26, when a phase-related pulse with
a rising edge input to the TA4IN pin is input after the level of TA4OUT
pin changes from “L” to “H”, the count is incremented at the respec-
tive rising edge and falling edge of the TA4OUT pin and TA4IN pin.
When a phase-related pulse with a falling edge input to the TA4OUT
pin is input after the level of TA4IN pin changes from “H” to “L”, the
count is decremented at the respective rising edge and falling edge
of the TA4IN pin and TA4OUT pin. When performing this two-phase
pulse signal processing, timer Aj mode register bit 0 and bit 4 must
0 1 0 0 : Always “0100” when processing
two-phase pulse signal
× × : Not used in event counter mode
Fig. 27 Timer Aj mode register bit configuration when performing
two-phase pulse signal processing in event counter mode
TAkOUT
TAkIN
(k = 2, 3)
Increment-
count
Increment- Increment- Decrement- Decrement-
count count count count
Decrement-
count
Fig. 25 Two-phase pulse processing operation of timers A2 and timer A3
TA4OUT
Increment-count at each edge
Decrement-count at each edge
TA4IN
Increment-count at each edge
Decrement-count at each edge
Fig. 26 Two-phase pulse processing operation of timer A4
28
RENESAS [ RENESAS TECHNOLOGY CORP ]
