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M37754S4CGP 参数 Datasheet PDF下载

M37754S4CGP图片预览
型号: M37754S4CGP
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片16位CMOS微机 [SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER]
分类和应用: 微控制器和处理器外围集成电路计算机时钟
文件页数/大小: 115 页 / 1558 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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MITSUBISHI MICROCOMPUTERS  
M37754M8C-XXXGP, M37754M8C-XXXHP  
M37754S4CGP, M37754S4CHP  
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER  
The INT3 interrupt can function as the key input interrupt by setting  
to KI0 pins is performed.  
bits 7 and 6 of the INT3 interrupt control register. The key input inter-  
rupt uses inputs KI3 to KI0 or inputs KI4 to KI0. Figure 10 shows the  
interrupt control register bit configuration. Figure 15 shows the par-  
ticular function select register 1 bit configuration, and Figure 16  
shows the INT3/key input interrupt input circuit block diagram.  
When the INT3 interrupt control register’s bit 7 is “0” and its bit 6 is  
“0”, a signal from the INT3 pin is connected to the INT3 interrupt con-  
trol circuit and INT3 external interrupt is normally performed.  
When the INT3 interrupt control register’s bit 7 is “1” and its bit 6 is  
“0”, signals from the KI3 to KI0 pins, which correspond to ports P57 to  
P54, are inverted and then the logical sum of these signals is con-  
nected to the INT3 interrupt control circuit. In this case, the external  
interrupt which uses the KI3 to KI0 pins is performed.  
When using the above key input interrupt, select the edge sense  
which uses the falling edge from “H” to “L” with the INT3 interrupt  
control register so that an interrupt request can occur by inputting “L”  
to each of the KI3 to KI0 pins or the KI4 to KI0 pins. The interrupt vec-  
tor is common to the INT3 interrupt’s one. Additionally, pull-up resis-  
tor (transistors) can be added to the KI4 to KI0 pins by setting the  
contents of the particular function select register 1’s bits 7 and 6 and  
setting “0” to each bit of the corresponding port’s direction register.  
When the INT3 interrupt control register’s bit 7 is “1” and its bit 6 is  
“1”, signals from the KI4 pin, which corresponds to port P95, KI3 to  
KI0 pins, which correspond to ports P57 to P54, are inverted and then  
the logical sum of these signals is connected to the INT3 interrupt  
control circuit. In this case, the external interrupt which uses the KI4  
INT3 interrupt control register  
(Address 6F16)  
Pull-up select bit 1  
Port P95 direction register  
When the key input interrupt  
is selected, select the edge  
sense which uses falling edge  
from “H” to “L”.  
P95/INT3/KI4  
Key input interrupt select bit 1  
Bit 7 of INT interrupt  
control register  
3
Key input interrupt select bit 0  
(Bit 6 of INT3 interrupt control regis
0
Interrupt control circuit  
INT3 interrupt request  
Pu0  
on  
Pull-up  
transistor  
1
P57/TA3IN/KI3  
Pull-up  
transistor  
Port P56 direction  
register  
P56/TA3OUT/KI2  
Pull-up  
transistor  
Port P55 direction  
register  
P55/TA2IN/KI1  
Pull-up  
Port P54 direction  
register  
transistor  
P54/TA2OUT/KI0  
Fig. 16 INT3/key input interrupt input circuit block diagram  
22  
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