MITSUBISHI MICROCOMPUTERS
M37280MF–XXXSP, M37280MK–XXXSP
M37280EKSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
■SFR2 area (addresses 20016 to 21F16)
Bit allocation
State immediately after reset
:
: “0” immediately after reset
0
1
?
Function bit
Name
:
: “1” immediately after reset
: No function bit
: Indeterminate immediately
after reset
: Fix to this bit to “0”
(do not write to “1”)
0
1
: Fix to this bit to “1”
(do not write to “0”)
Address
Register
Bit allocation
State immediately after reset
b7
b0 b7
b0
20016
20116
20216
20316
PWM0 register (PWM0)
PWM1 register (PWM1)
PWM2 register (PWM2)
PWM3 register (PWM3)
PWM4 register (PWM4)
PWM5 register (PWM5)
PWM6 register (PWM6)
?
?
?
?
?
?
?
?
?
20416
20516
20616
20716 PWM7 register (PWM7)
20816
20916
?
20A16
20B16
20C16
PWM mode register 1 (PN)
PWM mode register 2 (PW)
PN4 PN3
PN0
0016
0016
0016
0016
0016
0016
0016
0016
0016
0016
PW6 PW5 PW4 PW3 PW2 PW1 PW0
PW7
ROM correction address 1 (high-order)
ROM correction address 1 (low-order)
ROM correction address 2 (high-order)
20D16
20E16
20F16 ROM correction address 2 (low-order)
21016
INT3
POL
AD/INT3
SEL
RCR1 RCR0
RE5
RE5
RE3 RE2 RE1
0
0016
0
ROM correction enable register (RCR)
Test register
21116
21216
21316
INT3
POL3
POL
INT3
AD/INT3
AD/INT3
POL2 POL1
RE3 RE2 RE1
Interrupt input polarity register (IP)
Serial I/O mode register (SM)
SEL
SEL
AD/INT3 SM6 SRME55 SM4 SRME33 SRME22 SRME11 SM0
SEL
POL
21416 Serial I/O register (SIO)
?
OC27
AD/INT3
SEL
OC26 OC25 OC24
INT3
OC20
OC23 OC12 OC21
RE RE
0016
0016
8016
0016
0016
0716
FF16
?
OSD control register 2(OC2)
21516
21616
21716
21816
P0OL
0
0
0
CS2 CS1 CS0
Clock control register (CS)
INT3
POL
AD/INT3
SPELC7 PC6 RPCE5 PC4 RE3 RPCE2 RPCE1 PC0
I/O polarity control register (PC)
INT3
POL
AD/INT3
SEL
RE5 RC4 RCE3 RCE2 RCE1 RC0
Raster color register (RC)
OC37 OC36 OC35 OC34 OC33 OC32 OC31 OC30
RE3 RE2 RE1
21916 OSD control register 3(OC3)
21A16
21B16
21C16
21D16
21E16
21F16
Timer 5 (TM5)
Timer 6 (TM6)
TB17 TB16
TB15 TB14
BB15 BB14
TB10
BB10
TB13 TB12 TB11
BB13 BB12 BB11
Top border control register 1 (TB1)
Bottom border control register 1 (BB1)
Top border control register 1 (TB2)
Bottom border control register 1 (BB2)
BB17
BB16
?
?
?
TB21 TB20
BB21 BB20
Fig. 12.2.5 Memory Map of Special Function Register 2 (SFR2) (1)
Rev. 1.0
17
RENESAS [ RENESAS TECHNOLOGY CORP ]
