M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
Address 00ED16
OSD Clock Selection Register
b7 b6 b5 b4 b3 b2 b1 b0
OSD clock selection register (CK) [Address 00ED16
]
0
0 0 0 0 0
B
Name
Functions
After reset
0
R
R
W
W
0, 1 OSD clock
selection bits
(CK0,CK1)
Functions
b1 b0
The clock for display is supplied by connecting RC
or LC across the pins OSC1 and OSC2.
0
0
0
1
Since the main clock is used as the
clock for display, the oscillation
OSD oscillation
frequency
frequency is limited. Because of this,
the character size in width (horizontal)
direction is also limited. In this case,
pins OSC1 and OSC2 are also used
= f(XIN)
1
1
OSD oscillation
frequency
= f(XIN)/1.5
0
1
as input ports P33 and P34 respectively.
The clock for OSD is supplied by connecting the
following across the pins OSC1 and OSC2.
• a ceramic resonator only for OSD
• a quartz-crystal oscillator only for OSD and a
feedback resistor (See note
)
2 to 7 Fix these bits to “0.”
0
R
W
Note: It is necessary to connect other ceramic resonator or quartz-crystal oscillator for OSD across the pINs
XIN and XOUT.
Addresses 00EE16
A-D Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
A-D control register 1 (AD1) [Address 00EE16
]
B
Name
Functions
After reset R W
0
to
2
Analog input pin selection
bits
(ADM0 to ADM2)
b2 b1 b0
0
R W
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0 : A-D1
1 : A-D2
0 : A-D3
1 : A-D4
0 : A-D5
1 : A-D6
0 : Do not set
1 : Do not set
3
4
This bit is a write disable bit.
When this bit is read out, the value is “0.”
0
—
—
—
R
0: Input voltage < reference voltage
1: Input voltage > reference voltage
Storage bit of comparison
result (ADM4)
Indeterminate R
5
to
7
Nothing is assigned. This bits are write disable bits.
When these bits are read out, the values are “0.”
0
R
Rev.1.00 Oct 01, 2002 page 104 of 110
REJ03B0134-0100Z
RENESAS [ RENESAS TECHNOLOGY CORP ]
