MITSUBISHI MICROCOMPUTERS
4513/4514 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
PORT BLOCK DIAGRAMS (continued)
Direction register FR0i
Ai
D
T
Q
P5
0
–P5
3
OP5A instruction
Register A
IAP5 instruction
Register Y
Decoder
Skip decision
(SZD instruction)
CLD instruction
S
D
0
–D
5
Q
SD instruction
RD instruction
R
Skip decision (SZD instruction)
Clock input for timer 2 event count
Register Y
Decoder
CLD instruction
S
SD instruction
RD instruction
Timer 1 underflow signal divided by 2 or
signal of AND operation between
timer 1 underflow signal divided by 2 and
timer 2 underflow signal divided by 2
R
Q
W6
0
0
1
D
6
/CNTR0
Skip decision (SZD instruction)
Clock input for timer 4 event count
Register Y
Decoder
CLD instruction
SD instruction
RD instruction
Timer 3 underflow signal divided by 2 or
signal of AND operation between
timer 3 underflow signal divided by 2 and
timer 4 underflow signal divided by 2
S
R
Q
W6
2
0
1
D
7
/CNTR1
This symbol represents a parasitic diode on the port.
•
• Applied potential to ports D
0
–D
7
must be 12 V.
• i represents 0, 1, 2, or 3.
• The 4513 Group does not have port P5.
13
RENESAS [ RENESAS TECHNOLOGY CORP ]
