ADDRESS SPACE
3.4 Internal RAM and SFR Areas
3
SFR Area Register Map (3/27)
Address
b0
+0 address
+1 address
See pages
b7 b8
b15
H'0080 0116
SIO0 Receive Control Register
(S0RCNT)
SIO0 Baud Rate Register
(S0BAUR)
12-20
12-23
|
(Use inhibited area)
H'0080 0120
H'0080 0122
H'0080 0124
H'0080 0126
|
SIO1 Transmit Control Register
(S1TCNT)
SIO1 Transmit/Receive Mode Register
(S1MOD)
12-14
12-15
SIO1 Transmit Buffer Register
12-18
(S1TXB)
SIO1 Receive Buffer Register
(S1RXB)
12-19
SIO1 Receive Control Register
SIO1 Baud Rate Register
(S1BAUR)
12-20
12-23
(S1RCNT)
(Use inhibited area)
H'0080 0130
H'0080 0132
H'0080 0134
H'0080 0136
|
SIO2 Transmit Control Register
(S2TCNT)
SIO2 Transmit/Receive Mode Register
(S2MOD)
12-14
12-15
12-18
SIO2 Transmit Buffer Register
(S2TXB)
SIO2 Receive Buffer Register
(S2RXB)
12-19
SIO2 Receive Control Register
SIO2 Baud Rate Register
(S2BAUR)
12-20
12-23
(S2RCNT)
(Use inhibited area)
H'0080 0140
H'0080 0142
H'0080 0144
H'0080 0146
|
SIO3 Transmit Control Register
(S3TCNT)
SIO3 Transmit/Receive Mode Register
(S3MOD)
12-14
12-15
12-18
SIO3 Transmit Buffer Register
(S3TXB)
SSIO3 Receive Buffer Register
(S3RXB)
12-19
SIO3 Receive Control Register
SIO3 Baud Rate Register
(S3BAUR)
12-20
12-23
(S3RCNT)
(Use inhibited area)
(Use inhibited area)
H'0080 0180
H'0080 0182
|
CS0 Area Wait Control Register
(CS0WTCR)
CS2 Area Wait Control Register
(CS2WTCR)
CS1 Area Wait Control Register
(CS1WTCR)
CS3 Area Wait Control Register
(CS3WTCR)
16-4
16-4
H'0080 01E0
H'0080 01E2
H'0080 01E4
H'0080 01E6
H'0080 01E8
H'0080 01EA
H'0080 01EC
H'0080 01EE
H'0080 01F0
H'0080 01F2
H'0080 01F4
H'0080 01F6
|
Flash Mode Register
(FMOD)
Flash Control Register 1
(FCNT1)
Flash Control Register 3
(FCNT3)
Flash Status Register 1
(FSTAT1)
Flash Control Register 2
(FCNT2)
Flash Control Register 4
(FCNT4)
6-4
6-5
6-7
6-8
6-9
(Use inhibited area)
Virtual Flash S Bank Register 0
(FESBANK0)
Virtual Flash S Bank Register 1
(FESBANK1)
Virtual Flash S Bank Register 2
(FESBANK2)
6-11
6-11
6-11
6-11
6-11
6-11
6-11
6-11
Virtual Flash S Bank Register 3
(FESBANK3)
Virtual Flash S Bank Register 4
(FESBANK4)
Virtual Flash S Bank Register 5
(FESBANK5)
Virtual Flash S Bank Register 6
(FESBANK6)
Virtual Flash S Bank Register 7
(FESBANK7)
(Use inhibited area)
H'0080 0200
H'0080 0202
(Use inhibited area)
Clock Bus & Input Event Bus Control Register
10-16
10-12
(CKIEBCR)
Prescaler Register 0
(PRS0)
Prescaler Register 1
(PRS1)
32180 Group User’s Manual (Rev.1.0)
3-10