MULTIJUNCTION TIMERS
10.2 Common Units of Multijunction Timers
10
10.2.2 Prescaler Unit
The Prescalers PRS0–5 area an 8-bit counter, which generates clocks supplied to each timer (TOP, TIO, TMS,
TML, TID and TOU) from the internal peripheral clock (BCLK) divided by 2 (10 MHz when f(BCLK) = 20 MHz).
The values of prescaler registers are initialized to H’00 immediately after reset. When the set value of any
prescaler register is rewritten, the prescaler starts operating with the new value at the same time it has
underflowed.
Values H’00 to H’FF can be set in the prescaler register. The prescaler’s divide-by ratio is given by the equation
below:
1
Prescaler divide-by ratio =
prescaler set value + 1
Prescaler Register 0 (PRS0)
Prescaler Register 1 (PRS1)
Prescaler Register 2 (PRS2)
Prescaler Register 3 (PRS3)
Prescaler Register 4 (PRS4)
Prescaler Register 5 (PRS5)
<Address: H’0080 0202>
<Address: H’0080 0203>
<Address: H’0080 0204>
<Address: H’0080 07D0>
<Address: H’0080 0BD0>
<Address: H’0080 0CD0>
b0
b8
1
9
2
3
4
5
6
b7
10
11
12
13
14
b15
PRS0–PRS5
0
0
0
0
0
0
0
0
<After reset: H’00>
b
Bit Name
Function
R
R
W
W
0–7
PRS0–PRS5
Prescaler
Set the prescaler divide-by value
(8–15)
Prescaler Registers 0–2 start counting immediately after reset. Prescaler Registers 3–5 each are activated by
setting the TID0 Control & Prescaler 3 Enable Register, TID1 Control & Prescaler 4 Enable Register or TID2
Control & Prescaler 5 Enable Register’s prescaler-n enable (PRSnEN) bit to "1" (count start), upon which the
prescaler register value is reloaded and the prescaler starts counting. For details, see Section 10.7, “TID (Input-
Related 16-Bit Timer).”
If the prescaler register is accessed for read during operation, the value written into it, not the current count, is
read out.
32180 Group User’s Manual (Rev.1.0)
10-12