DMAC
9.1 Outline of the DMAC
9
Input event bus
3 2 1 0
Output event bus
0
1 2 3
AD0 conversion
completed
TIO8_udf
AD0 conversion
completed
TIN0S
TIO8_udf
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
udf
end
DMA0
DMA1
DMA2
DMA3
DMA4
Software
start
TID0_udf/ovf
CAN0_S0/S15
TIN3S
TID1_udf/ovf
TIN13S
udf
end
Software start
CAN0_S1/S14
TID2_udf/ovf
TIN18S
udf
end
Software start
TIN0S
AD1 conversion
completed
SIO0_TXD
SIO1_RXD
Software start
udf
end
TIN19S
SIO0_TXD
TOU1_7irq
SIO0_RXD
Software start
udf
end
DMA0–4
interrupt
TIN20S
TOU0_0irq
TOU2_7irq
Software start
udf
DMA5
SIO2_RXD
end
TOU0_1irq
SIO1_RXD
SIO1_TXD
TIN1S
Software start
udf
DMA6
end
SIO3_TXD
TOU0_2irq
SIO2_TXD
TIN2S
Software start
udf
DMA7
end
TOU0_6irq
TIN7S
SIO3_RXD
Software start
udf
DMA8
end
AD1 conversion
completed
TOU0_7irq
SIO3_TXD
TIN8S
Software start
S
udf
DMA9
DMA5–9
interrupt
end
3
2 1 0
0
1 2 3
Figure 9.1.1 Block Diagram of the DMAC
32180 Group User’s Manual (Rev.1.0)
9-3
RENESAS [ RENESAS TECHNOLOGY CORP ]
