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M32180F8TFP 参数 Datasheet PDF下载

M32180F8TFP图片预览
型号: M32180F8TFP
PDF下载: 下载PDF文件 查看货源
内容描述: 32位RISC单芯片微型计算机M32R系列M32R / ECU系列 [32-Bit RISC Single-Chip Microcomputers M32R Family M32R/ECU Series]
分类和应用: 计算机
文件页数/大小: 839 页 / 3694 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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INPUT/OUTPUT PORTS AND PIN FUNCTIONS  
8.3 Input/Output Port Related Registers  
8
(3) PIEN0 (Port input enable) bit (Bit 15)  
This bit is used to prevent current from flowing into the port input pins.  
Because the input/output ports are disabled against input after reset, if any ports need to be used in input  
mode they must be enabled for input by setting this bit to "1".  
When disabled against input, the input/output ports are in a state equivalent to a situation where the pin has  
a low-level input applied. Consequently, if a peripheral input function is selected for any port (uncontrolled  
pin) while disabled against input by using the Port Operation Mode Register, the port may operate unexpect-  
edly due to the low-level input on it.  
The following shows the procedure for selecting a peripheral input function.  
(1) Enable the port for input when its pin level is valid (high or low)  
(2) Select a function using the port operation mode bit  
During boot mode, the pins shared with serial I/O functions are enabled for input and can therefore be  
protected against current flowing in from the pins other than serial I/O functions during flash programming by  
clearing PIEN0.  
The table below lists the pins that can be controlled by the PIEN0 bit in each operation mode.  
Table 8.3.2 Pins Controllable by PIEN0 Bit  
Mode Name  
Controllable Pins  
Uncontrolled Pins  
P00–P07, P10–P17, P20–P27  
P221, P223,  
P30–P37, P41–P47, P61–P63  
FP, MOD0, MOD1, SBI#, RESET#  
Single-chip  
P65–P67, P70–P77, P82–P87  
P93–P97, P100–P107, P110–P117  
P124–P127, P130–P137, P140–P147  
P150–P157, P160–P167, P172–P177  
P180–P187, P190–P197, P200–P203  
P210–P217, P220–P222, P224–P227  
P61–P63, P65–P67, P70–P77  
P82–P87, P93–P97, P100–P107  
P110–P117, P124–P127, P130–P137  
P140–P147, P150–P157, P160–P167  
P172–P177, P180–P187, P190–P197  
P200–P203, P210–P217, P220  
P222  
P00–P07, P10–P17  
P20–P27, P30–P37  
P41–P47, P221, P223–P227  
FP, MOD0, MOD1, SBI#, RESET#  
External extension  
Microprocessor  
P00–P07, P10–P17, P20–P27  
P30–P37, P41–P47, P61–P63  
P67, P70–P77, P93–P97  
P65, P66, P82–P87, P101  
P135–P136, P174–P177, P200–P203  
P221, P223,  
Boot  
(single-chip)  
P100, P102–P107, P110–P117, P124–P127  
P130–P134, P137, P140–P147, P150–P157  
P160–P167, P172–P173, P180–P187  
P190–P197, P210–P217, P220  
FP, MOD0, MOD1, SBI#, RESET#  
P222, P224–P227  
32180 Group User’s Manual (Rev.1.0)  
8-23  
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