INPUT/OUTPUT PORTS AND PIN FUNCTIONS
8.2 Selecting Pin Functions
8
0
1
2
3
4
5
6
7
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
P0
P1
P2
P3
P4
DB8
A23
A15
DB9
A24
A16
DB10
A25
DB11
A26
DB12
A27
DB13
A28
DB14
A29
DB15
A30
CPU operation
mode settings
(Note 1)
A17
A18
A19
A20
A21
A22
BLW# /
BLE#
BHW# /
BHE#
RD#
CS0#
CS1#
A13
A14
(Reserved) P5
SBI#
SCLKI4 / SCLKI5 /
SCLKO4 SCLKO5
P6
P7
P8
P9
(P61)
(P62)
HREQ#
TXD0
(P63)
(P67)
(Note 3)
BCLK /
WR#
WAIT#
HACK# RTDTXD RTDRXD RTDACK RTDCLK
MOD0
(Note 3)
MOD1
(Note 3)
SCLKI0 /
SCLKO0
SCLKI1 /
SCLKO1
RXD0
TO16
TO11
TO3
TXD1
TO18
TO13
TO5
RXD1
TO19
TO14
TO6
TO17
TO12
TO4
TO20
TO15
TO7
TO9 /
TXD3(Note 2
TO10 /
CTX1(Note 2)
P10
TO8
TO0
)
P11
P12
P13
TO1
TO2
TCLK0
TIN20
TIN12
TIN4
TCLK1
TIN21
TIN13
TIN5
TCLK2
TIN22
TIN14
TIN6
TCLK3
TIN23
TIN15
TIN7
TIN16/
TIN17/
PWMOFF0 PWMOFF1
TIN18
TIN10
TIN2
TIN19
TIN11
TIN3
Input/output port
operation mode
setting registers P14
TIN8
TIN0
TO21
TIN9
TIN1
TO22
P15
P16
P17
P18
P19
P20
P21
P22
TO23
TIN24
TO31
TIN28
TXD5
TO39
CTX1
TO24
TIN25
TO32
TIN29
RXD5
TO40
CRX1
TO25
TXD2
TO33
TIN30
TO26
RXD2
TO34
TIN31
TO27
TXD3
TO35
TIN32
TO28
RXD3
TO36
TO29
TIN26
TXD4
TO37
CTX0
TO30
TIN27
RXD4
TO38
CRX0
TIN33/
PWMOFF2
TO41
A11 /
TO42
A12 /
TO43
CS2#
TO44
CS3#
CS2#(Note 2) CS3#(Note 2)
(Note 1)
Note 1: During processor mode, these ports are switched to function as extended external signal pins. During external extension
mode, only P41-P43 are switched to function as external bus interface pins. Other pins become input/output port pins
when reset, so that some of these pins, if needed, must be set to function as external bus interface pins.
Note 2: These are triple-function pins. Their desired output function must be selected using the peripheral output select register.
Note 3: These ports cannot be used for input/output port function. The SBI#, MOD0 and MOD1 pin input levels can be read from
these ports.
Figure 8.2.1 Input/Output Ports and Pin Function Assignments
32180 Group User’s Manual (Rev.1.0)
8-4
RENESAS [ RENESAS TECHNOLOGY CORP ]
