RESET
7.3 Internal State Immediately after Reset
7
7.3 Internal State Immediately after Reset
The table below lists the internal state of the microcomputer immediately after it has gotten out of a reset state. For
details about the initial register state of each internal peripheral I/O, see each section in this manual in which the
relevant internal peripheral I/O is described.
Table 7.3.1 Internal State Immediately after Reset
Register
PSW
CBR
State after Reset
(CR0)
(CR1)
(CR2)
(CR3)
(CR6)
(CR7)
B'0000 0000 0000 0000 ??00 000? 0000 0000 (BSM, BIE, BC bits = undefined)
H'0000 0000 (C bits = 0)
SPI
Undefined
SPU
Undefined
BPC
Undefined
FPSR
PC
H'0000 0100 (Only DN bit = 1)
H'0000 0000 (Executed beginning with the address H’0000 0000) (Note 1)
R0–R15
Undefined
ACC (accumulator)
RAM
Undefined
Undefined when reset at power-on. (However, if the RAM is gotten out of reset after
returning from backup mode, it retains the content it had before being reset.)
Note 1: When in boot mode, the CPU executes the boot program.
7.4 Things to Be Considered after Reset
• Input/output ports
After reset, the microcomputer’s input/output ports are disabled against input in order to prevent current from
flowing through the port. To use any ports in input mode, set the Port Input Special Function Control Register
(PICNT) PIEN0 bit to enable them for input. For details, see Section 8.3, “Input/Output Port Related Registers.”
32180 Group User’s Manual (Rev.1.0)
7-4
RENESAS [ RENESAS TECHNOLOGY CORP ]
