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M32180F8TFP 参数 Datasheet PDF下载

M32180F8TFP图片预览
型号: M32180F8TFP
PDF下载: 下载PDF文件 查看货源
内容描述: 32位RISC单芯片微型计算机M32R系列M32R / ECU系列 [32-Bit RISC Single-Chip Microcomputers M32R Family M32R/ECU Series]
分类和应用: 计算机
文件页数/大小: 839 页 / 3694 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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EIT  
4.8 Exception Processing  
4
(3) Saving the PC  
The PC value of the instruction that generated the FPE exception + 4 is set in the BPC register.  
Because all of the instructions that generate an FPE exception are 32 bits long, the address to which the  
RTE returns is always the instruction next to the one that generated the FPE exception.  
(4) Branching to the EIT vector entry  
The CPU branches to the address H’0000 0090 in the user space. This is the last operation performed in  
hardware preprocessing.  
(5) Jumping from the EIT vector entry to the user-created handler  
The CPU executes the BRA instruction written by the user at the address H’0000 0090 of the EIT vector  
entry to jump to the start address of the user-created handler. At the beginning of the user-created EIT  
handler, first save the BPC, PSW and FPSR registers and the necessary general-purpose registers to the  
stack.  
(6) Returning from the EIT handler  
At the end of the EIT handler, restore the saved registers from the stack and execute the RTE instruction.  
When the RTE instruction is executed, hardware postprocessing is automatically performed.  
32180 Group User’s Manual (Rev.1.0)  
4-14  
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