M16C/62P Group (M16C/62P, M16C/62PT)
5. Electrical Characteristics
VCC1=VCC2=5V
Switching Characteristics
(VCC1 = VCC2 = 5V, VSS = 0V, at Topr = −20 to 85°C / −40 to 85°C unless otherwise specified)
Table 5.28
Memory Expansion and Microprocessor Modes (for 1- to 3-wait setting and external
area access)
Standard
Symbol
Parameter
Unit
Min.
Max.
25
td(BCLK-AD)
th(BCLK-AD)
th(RD-AD)
Address Output Delay Time
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Output Hold Time (in relation to BCLK)
Address Output Hold Time (in relation to RD)
Address Output Hold Time (in relation to WR)
Chip Select Output Delay Time
4
0
th(WR-AD)
(NOTE 2)
td(BCLK-CS)
th(BCLK-CS)
td(BCLK-ALE)
th(BCLK-ALE)
td(BCLK-RD)
th(BCLK-RD)
td(BCLK-WR)
th(BCLK-WR)
td(BCLK-DB)
th(BCLK-DB)
td(DB-WR)
25
15
25
25
40
Chip Select Output Hold Time (in relation to BCLK)
ALE Signal Output Delay Time
4
-4
0
ALE Signal Output Hold Time
See
Figure 5.2
RD Signal Output Delay Time
RD Signal Output Hold Time
WR Signal Output Delay Time
WR Signal Output Hold Time
0
Data Output Delay Time (in relation to BCLK)
Data Output Hold Time (in relation to BCLK) (3)
Data Output Delay Time (in relation to WR)
Data Output Hold Time (in relation to WR)(3)
HLDA Output Delay Time
4
(NOTE 1)
(NOTE 2)
th(WR-DB)
td(BCLK-HLDA)
40
NOTES:
1. Calculated according to the BCLK frequency as follows:
9
n is “1” for 1-wait setting, “2” for 2-wait setting
and “3” for 3-wait setting.
(BCLK) is 12.5MHz or less.
(n – 0.5)x10
------------------------------------ – 40 [n s ]
f(BCLK)
2. Calculated according to the BCLK frequency as follows:
9
0.5x10
----------------------- – 10[ns]
f(BCLK)
3. This standard value shows the timing when the output is off, and
does not show hold time of data bus.
Hold time of data bus varies with capacitor volume and pull-up
(pull-down) resistance value.
R
C
Hold time of data bus is expressed in
t = −CR X ln (1−VOL / VCC2)
by a circuit of the right figure.
DBi
For example, when VOL = 0.2VCC2, C = 30pF, R = 1kΩ, hold time
of output ”L” level is
t = −30pF X 1kΩ X In(1−0.2VCC2 / VCC2)
= 6.7ns.
Rev.2.41 Jan 10, 2006 Page 54 of 96
REJ03B0001-0241
RENESAS [ RENESAS TECHNOLOGY CORP ]
