Mitsubishi microcomputers
M16C / 62A Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Reset
(28)UART1 transmit interrupt control register
(29)UART1 receive interrupt control register
(1) Processor mode register 0
(000416)···
0016
0 0
(005316)···
(005416)···
(005516)···
(005616)···
(005716)···
(005816)···
?
?
?
?
?
?
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(2) Processor mode register 1
(3) System clock control register 0
(4) System clock control register 1
(000516)··· 0
(000616)··· 0
(000716)··· 0
0
1
0
0
0
0
1
0
0
0
0
(30)
(31)
(32)
(33)
Timer A0 interrupt control register
Timer A1 interrupt control register
Timer A2 interrupt control register
Timer A3 interrupt control register
0
0
0
1 0
0 0
0
0
(5)
(6)
Chip select control register
(000816)···
(000916)···
0
0 0 0 1
0
0
Address match interrupt enable
register
(34)
(35)
(36)
(37)
(38)
(39)
(40)
(41)
(42)
(43)
(44)
(45)
Timer A4 interrupt control register
Timer B0 interrupt control register
Timer B1 interrupt control register
Timer B2 interrupt control register
INT0 interrupt control register
(005916)···
(005A16)···
(005B16)···
(005C16)···
(005D16)···
(005E16)···
(005F16)···
(034016)···
(034816)···
(034916)···
(034A16)···
(034B16)···
(035B16)···
?
?
?
?
?
?
?
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(7) Protect register
(000A16)···
0
0
?
0
?
(8)
(9)
Watchdog timer control register
(000F16)··· 0
0
0
?
? ?
Address match interrupt register 0 (001016)···
0016
0016
(001116)···
(001216)···
Address match interrupt register 1 (001416)···
(001516)···
0 0
0
0
0
0
0
0
0
0
(10)
0016
0016
INT1 interrupt control register
INT2 interrupt control register
(001616)···
0 0
0
0
0
0
0
0
0
0
0
0
0
Timer B3,4,5 count start flag
0
0
0
(11)
(12)
(13)
(14)
(15)
(16)
Three-phase PWM control register 0
Three-phase PWM control register 1
Three-phase output buffer register 0
Three-phase output buffer register 1
0016
DMA0 control register
(002C16)··· 0
(003C16)··· 0
(004416)···
(004516)···
(004616)···
(004716)···
(004816)···
(004916)···
(004A16)···
(004B16)···
(004C16)···
0
0
0
0
0
0
0
0
0 ?
0 ?
DMA1 control register
0016
0016
INT3 interrupt control register
Timer B5 interrupt control register
Timer B4 interrupt control register
Timer B3 interrupt control register
?
?
?
0 0
0
0
0
0
0
0
0016
(46)Timer B3 mode register
0
0
0
0
0
0
?
?
?
?
0 0
0 0
0 0
0
0
0
0
0
0
? 0
Timer B4 mode register
Timer B5 mode register
(035C16)···
(035D16)···
(035F16)···
(036216)···
(036616)···
(47)
(48)
(17)SI/O4 interrupt control register
0 0 ? 0
(18)
(19)
(20)
(21)
(22)
(23)
SI/O3 interrupt control register
(49)Interrupt cause select register
0
0
? 0
? 0
? 0
? 0
? 0
? 0
0
0
0
0
0
0
0
0
0
0
0
0
0016
Bus collision detection interrupt
control register
SI/O3 control register
SI/O4 control register
(50)
(51)
4016
4016
DMA0 interrupt control register
DMA1 interrupt control register
UART2 special mode register 3 (Note)
UART2 special mode register 2
UART2 special mode register
(037516)···
(037616)···
(037716)···
(52)
(53)
(54)
?
Key input interrupt control register (004D16)···
0016
0016
A-D conversion interrupt control
register
(004E16)···
(004F16)···
(005016)···
(24)
(25)
(26)
(27)
UART2 transmit interrupt control
register
? 0
? 0
0
0
0
0
0
0
0
0
(55)
(56)
(037816)···
0016
UART2 transmit/receive mode register
UART2 receive interrupt control
register
UART2 transmit/receive control register 0 (037C16)··· 0
(037D16)···
0
0
0
0
0
0
1 0
0 0
0
1
0
0
UART0 transmit interrupt control
register
(57)
UART2 transmit/receive control register 1
?
?
0
0
0
(005116)···
(005216)···
UART0 receive interrupt control
register
x : Nothing is mapped to this bit
? : Undefined
The content of other registers are undefined when the microcomputer is reset. The initial values must therefore be set.
The RAM is undefined at power on. The initial values must therefore be set. When a reset signal is applied while the CPU is writing a value to the RAM,
the value may be set as unknown due to the termination of the CPU access.
Note: “0016” is read out when set bit 7 (SDDS) of the UART2 special mode register (address 037716) to “1”.
Figure 1.6.3. Device's internal status after a reset is cleared
16