Mitsubishi microcomputers
M16C / 62A Group (80-pin)
Memory
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Operation of Functional Blocks
The M16C/62A (80-pin version) group accommodates certain units in a single chip. These units include
ROM and RAM to store instructions and data and the central processing unit (CPU) to execute arithmetic/
logic operations. Also included are peripheral units such as timers, serial I/O, D-A converter, DMAC, CRC
calculation circuit, A-D converter, and I/O ports.
The following explains each unit.
Memory
Figure 1.4.1 is a memory map of the M16C/62A (80-pin version) group. The address space extends the 1M
bytes from address 00000
16
to FFFFF
16
. From FFFFF
16
down is ROM. For example, in the M30623MCA-
XXXGP, there is 128K bytes of internal ROM from E0000
16
to FFFFF
16
. The vector table for fixed interrupts
_______
such as the reset and NMI are mapped to FFFDC
16
to FFFFF
16
. The starting address of the interrupt
routine is stored here. The address of the vector table for timer interrupts, etc., can be set as desired using
the internal register (INTB). See the section on interrupts for details.
From 00400
16
up is RAM. For example, in the M30623MCA-XXXGP, 5K bytes of internal RAM is mapped
to the space from 00400
16
to 017FF
16
. In addition to storing data, the RAM also stores the stack used when
calling subroutines and when interrupts are generated.
The SFR area is mapped to 00000
16
to 003FF
16
. This area accommodates the control registers for periph-
eral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Figures 1.7.1 to 1.7.3 are location
of peripheral unit control registers. Any part of the SFR area that is not occupied is reserved and cannot be
used for other purposes.
The special page vector table is mapped to FFE00
16
to FFFDB
16
. If the starting addresses of subroutines
or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions
can be used as 2-byte instructions, reducing the number of program steps.
00000
16
SFR area
For details, see Figures
1.7.1 to 1.7.3
FFE00
16
00400
16
Internal RAM area
RAM size
3K bytes
4K bytes
5K bytes
10K bytes
20K bytes
Address XXXXX
16
00FFF
16
013FF
16
017FF
16
02BFF
16
053FF
16
XXXXX
16
Special page
vector table
Reserved
area
FFFDC
16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
NMI
Reset
ROM size
32K bytes
64K bytes
96K bytes
128K bytes
256K bytes
Address YYYYY
16
F8000
16
F0000
16
E8000
16
E0000
16
C0000
16
YYYYY
16
Internal ROM area
FFFFF
16
FFFFF
16
Note : These memory maps show an instance in which PM13 is set to 0; but in the
case of products in which the internal RAM and the internal ROM are expanded
to over 15 Kbytes and 192 Kbytes, respectively, they show an instance in which
PM13 is set to 1.
Figure 1.4.1. Memory map
10
RENESAS [ RENESAS TECHNOLOGY CORP ]
