M16C/62 Group (M16C/62P, M16C/62PT)
1. Overview
8
8
8
4
8
8
Port P0
Port P2
Port P3
(4)
Port P4
Port P5
Port P6
Port P7
4
Internal peripheral functions
Timer (16-bit)
Output (timer A): 5
Input (timer B): 6
Three-phase motor
control circuit
A-D converter
(10 bits
X
8 channels
Expandable up to 26 channels)
UART or
clock synchronous serial I/O (2 channels)
UART
(1 channel)
(3)
System clock
generation circuit
XIN-XOUT
XCIN-XCOUT
PLL frequency synthesizer
Ring oscillator
Clock synchronous serial I/O
Port P8
Port P8_5
7
CRC arithmetic circuit (CCITT )
(Polynomial : X
16
+X
12
+X
5
+1)
(8 bits
X
2 channels)
(4)
Watchdog timer
(15 bits)
M16C/60 series16-bit CPU core
R0H
R1H
R2
R3
A0
A1
FB
R0L
R1L
SB
USP
ISP
INTB
PC
FLG
Memory
ROM
(1)
RAM
(2)
Port P9
DMAC
(2 channels)
7
D-A converter
(8 bits X 2 channels)
Port P10
Multiplier
NOTES :
1. ROM size depends on microcomputer type.
2. RAM size depends on microcomputer type.
3. To use a UART2, set the CRD bit in the U2C0 register to “1” (CTS/RTS function disabled).
4. There is no external connections for port P1, P4_4 to P4_7, P7_2 to P7_5 and P9_1 in 80-pin version.
Set the direction bits in these ports to “1” (output mode), and set the output data to “0” (“L”) using the program.
8
Figure 1.2 M16C/62 Group (M16C/62P, M16C/62PT) 80-pin version Block Diagram
Rev.2.10 Nov. 07, 2003 page 6
of 84
RENESAS [ RENESAS TECHNOLOGY CORP ]
