Description
Section
Page
Item
(see Manual for details)
Only) [Option]
13.4 Application Notes
309
4. Note on Issuance of
Retransmission Start
Condition
Added
5. Note on Issuance of Stop
Condition
6. Countermeasure
7. Additional Note
8. Precautions when Clearing
the IRIC Flag when Using
the Wait Function
15.6.6 Effect on Absolute 352
Accuracy
Figure 15.10 Example of
Analog Input Circuit
Figure amended
18.3.2 Notes on
Programming
371
(1) description added.
21.1.7 Flash Memory
Operating Modes
500
Figure 21.2 Flash Memory
Related State Transitions
“SWE” amended to
“FLSHE”.
501
502
Figure 21.3 Boot Mode
Procedure 2 amended.
Procedure 2 amended.
Figure 21.4 User
Programming Mode (Example)
21.2.3 Erase Block
Register 2 (EBR2)
507
512
513
Bit 7 * and Note
description added.
21.3.1 Boot Mode
RAM Area Allocation in Boot
Mode
Description amended.
Figure 21.9 RAM Areas in
Boot Mode
Amended
Notes on Use of Boot Mode
5 description amended.
21.4 to 21.4.4
516 to 520
524
Entire description
amended.
21.5.1 Writer Mode
Setting
* and Note description
added.
21.5.3 Operation in
Writer Mode
534
Figure 21.22 Status Read
Mode Timing Waveforms
Note amended
Table 21.19 Status Read
Mode Return Codes
21.6 Flash Memory
Programming and Erasing
Precautions
536
537
(1) Program with the specified Description amended.
voltage and timing
Table 21.22 Area Accessed in FLSHE = 1 mode 2
Each Mode with FLSHE = 0
amended
RENESAS [ RENESAS TECHNOLOGY CORP ]
