Mode 2: In mode 2 (expanded mode with on-chip ROM enabled), port 2 can provide upper
address output pins and general input pins. Each pin becomes an upper address output pin if its
P2DDR bit is set to 1, and a general input pin if this bit is cleared to 0. Following a reset, all pins
are input pins. To be used for address output, their P2DDR bits must be set to 1. Figure 7.7 shows
the pin functions in mode 2.
When P2DDR = 1
When P2DDR = 0
A15 (output)
P27 (input)
P26 (input)
P25 (input)
P24 (input)
P23 (input)
P22 (input)
P21 (input)
P20 (input)
A14 (output)
A13 (output)
A12 (output)
A11 (output)
A10 (output)
Port 2
A9 (output)
A8 (output)
Figure 7.7 Pin Functions in Mode 2 (Port 2)
Mode 3: In mode 3 (single-chip mode), the input or output direction of each pin can be selected
individually. A pin becomes a general input pin when its P2DDR bit is cleared to 0, and a general
output pin when this bit is set to 1. Figure 7.8 shows the pin functions in mode 3.
P27 (input/output)
P26 (input/output)
P25 (input/output)
P24 (input/output)
Port 2
P23 (input/output)
P22 (input/output)
P21 (input/output)
P20 (input/output)
Figure 7.8 Pin Functions in Mode 3 (Port 2)
122
RENESAS [ RENESAS TECHNOLOGY CORP ]
