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HD64F7055S 参数 Datasheet PDF下载

HD64F7055S图片预览
型号: HD64F7055S
PDF下载: 下载PDF文件 查看货源
内容描述: 瑞萨32位RISC单片机SuperH RISC engine族/ SH7000系列 [Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7000 Series]
分类和应用:
文件页数/大小: 1002 页 / 4874 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Preface
The SH7055SF is a single-chip RISC (reduced instruction set computer) microcomputer that has
an original 32-bit RISC type CPU as its core, and also includes peripheral functions necessary for
system configuration.
The SH7055SF is equipped with on-chip peripheral functions necessary for system configuration,
including a floating-point unit (FPU), large-capacity ROM and RAM, a direct memory access
controller (DMAC), timers, a serial communication interface (SCI), Controller area network
(HCAN), A/D converter, interrupt controller (INTC), and I/O ports, therefore, it can be used as a
microprocessor built in a high-level control system.
The SH7055SF is an F-ZTAT™* (Flexible Zero Turn-Around Time) version with flash memory
as its on-chip ROM, and it can rapidly and flexibly deal with each situation on an application
system with fluid specifications from an early stage of mass production to full-scale production.
Note: F-ZTAT™ is a trademark of Renesas Technology Corp.
Target users: This manual was written for users who will be using the SH7055S F-ZTAT in
the design of application systems. Users of this manual are expected to
understand the fundamentals of electrical curcuits, logical circuits, and
microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of the SH7055S F-ZTAT to the above users.
Refer to the SH-2E Programming Manual for a detailed description of the
instruction set.
Notes on reading this manual:
In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, peripheral functions and electrical characteristics.
In order to understand the details of the CPU's functions
Read the SH-2E Programming Manual.
Rule:
Bit order:
The MSB (most significant bit) is on the left and the LSB (least
significant bit) is on the right.
Releated Manuals: The latest versions of all related manuals are available from our web site.
Please ensure you have the latest versions of all documents you require.
http://www.renesas.com/
Rev.2.0, 07/03, page v of xxxviii