欢迎访问ic37.com |
会员登录 免费注册
发布采购

HD64F36077G 参数 Datasheet PDF下载

HD64F36077G图片预览
型号: HD64F36077G
PDF下载: 下载PDF文件 查看货源
内容描述: 旧公司名称在产品目录等资料 [Old Company Name in Catalogs and Other Documents]
分类和应用:
文件页数/大小: 566 页 / 3220 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
 浏览型号HD64F36077G的Datasheet PDF文件第314页浏览型号HD64F36077G的Datasheet PDF文件第315页浏览型号HD64F36077G的Datasheet PDF文件第316页浏览型号HD64F36077G的Datasheet PDF文件第317页浏览型号HD64F36077G的Datasheet PDF文件第319页浏览型号HD64F36077G的Datasheet PDF文件第320页浏览型号HD64F36077G的Datasheet PDF文件第321页浏览型号HD64F36077G的Datasheet PDF文件第322页  
Section 15 14-Bit PWM  
15.4  
Operation  
When using the 14-bit PWM, set the registers in this sequence:  
1. Set the PWM bit in the port mode register 1 (PMR1) to set the P11/PWM pin to function as a  
PWM output pin.  
2. Set the PWCR0 bit in PWCR to select a conversion period of either.  
3. Set the output waveform data in PWDRU and PWDRL. Be sure to write byte data first to  
PWDRL and then to PWDRU. When the data is written in PWDRU, the contents of these  
registers are latched in the PWM waveform generator, and the PWM waveform generation  
data is updated in synchronization with internal signals.  
One conversion period consists of 64 pulses, as shown in figure 15.2. The total high-level width  
during this period (TH) corresponds to the data in PWDRU and PWDRL. This relation can be  
expressed as follows:  
TH = (data value in PWDRU and PWDRL + 64) × tφ/2  
where tφ is the period of PWM clock input: 2/φ (bit PWCR0 = 0) or 4/φ (bit PWCR0 = 1).  
If the data value in PWDRU and PWDRL is from H'FFC0 to H'FFFF, the PWM output stays high.  
When the data value is H'C000, TH is calculated as follows:  
TH = 64 × tφ/2 = 32 tφ  
Conversion period  
t f1  
t f2  
t f63  
t f64  
t H1  
t H2  
t H3  
t H63  
t H64  
...  
T H = t H1 + t H2 + t H3 + + t H64  
...  
t f1 = t f2 = t f3 = = t f64  
Figure 15.2 Waveform Output by 14-Bit PWM  
Rev. 3.00 Sep. 10, 2007 Page 284 of 528  
REJ09B0216-0300  
 复制成功!