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HD64F36077G 参数 Datasheet PDF下载

HD64F36077G图片预览
型号: HD64F36077G
PDF下载: 下载PDF文件 查看货源
内容描述: 旧公司名称在产品目录等资料 [Old Company Name in Catalogs and Other Documents]
分类和应用:
文件页数/大小: 566 页 / 3220 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Section 11 Timer B1  
Section 11 Timer B1  
Timer B1 is an 8-bit timer that increments each time a clock pulse is input. This timer has two  
operating modes, interval and auto reload. Figure 11.1 shows a block diagram of timer B1.  
11.1  
Features  
Selection of seven internal clock sources (φ/8192, φ/2048, φ/512, φ/256, φ/64, φ/16, and φ/4) or  
an external clock (can be used to count external events).  
An interrupt is generated when the counter overflows.  
TMB1  
φ
PSS  
TCB1  
TLB1  
TMIB1  
[Legend]  
TMB1: Timer mode register B1  
TCB1:  
TLB1:  
Timer counter B1  
Timer load register B1  
IRRTB1  
IRRTB1: Timer B1 interrupt request flag  
PSS: Prescaler S  
TMIB1: Timer B1 event input  
Figure 11.1 Block Diagram of Timer B1  
TIM08B0A_000020020200  
Rev. 3.00 Sep. 10, 2007 Page 179 of 528  
REJ09B0216-0300  
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