Table 13.2 RTC Registers......................................................................................................... 410
Table 13.3 Day-of-Week Codes (RWKCNT) .......................................................................... 413
Table 13.4 Day-of-Week Codes (RWKAR)............................................................................. 417
Table 13.5 Recommended Oscillator Circuit Constants (Recommended Values).................... 425
Table 14.1 SCI Pins ................................................................................................................. 431
Table 14.2 SCI Registers .......................................................................................................... 432
Table 14.3 SCSMR Settings..................................................................................................... 446
Table 14.4 Bit Rates and SCBRR Settings in Asynchronous Mode......................................... 447
Table 14.5 Bit Rates and SCBRR Settings in Synchronous Mode ........................................... 450
Table 14.6 Maximum Bit Rates for Various Frequencies with Baud Rate Generator
(Asynchronous Mode) ............................................................................................ 451
Table 14.7 Maximum Bit Rates with External Clock Input (Asynchronous Mode)................. 452
Table 14.8 Maximum Bit Rates with External Clock Input (Synchronous Mode) ................... 452
Table 14.9 Serial Mode Register Settings and SCI Communication Formats .......................... 454
Table 14.10 SCSMR and SCSCR Settings and SCI Clock Source Selection............................. 454
Table 14.11 Serial Communication Formats (Asynchronous Mode) ......................................... 456
Table 14.12 Receive Error Conditions and SCI Operation......................................................... 464
Table 14.13 SCI Interrupt Sources ............................................................................................. 484
Table 14.14 SCSSR Status Flags and Transfer of Receive Data ................................................ 485
Table 15.1 Smart Card Interface Pins....................................................................................... 491
Table 15.2 Registers ................................................................................................................. 491
Table 15.3 Register Settings for Smart Card Interface ............................................................. 497
Table 15.4 Relationship of n to CKS1 and CKS0..................................................................... 499
Table 15.5 Examples of Bit Rate B (Bits/s) for SCBRR Settings (n = 0)................................. 499
Table 15.6 Examples of SCBRR Settings for Bit Rate B (Bits/s) (n = 0)................................. 499
Table 15.7 Maximum Bit Rates for Frequencies (Smart Card Interface Mode)....................... 500
Table 15.8 Register Set Values and SCK Pin........................................................................... 500
Table 15.9 Smart Card Mode Operating State and Interrupt Sources....................................... 507
Table 16.1 SCIF Pins................................................................................................................ 515
Table 16.2 SCIF Registers........................................................................................................ 516
Table 16.3 SCSMR Settings..................................................................................................... 528
Table 16.4 Bit Rates and SCBRR Settings ............................................................................... 528
Table 16.5 Maximum Bit Rates for Various Frequencies with Baud Rate Generator
(Asynchronous Mode) ............................................................................................ 532
Table 16.6 Maximum Bit Rates with External Clock Input (Asynchronous Mode)................. 533
Table 16.7 SCSMR Settings and SCIF Communication Formats ............................................ 537
Table 16.8 SCSCR Settings and SCIF Clock Source Selection................................................ 538
Table 16.9 Serial Communication Formats .............................................................................. 538
Table 16.10 SCIF Interrupt Sources ........................................................................................... 550
Table 17.1 IrDA Pins................................................................................................................ 559
Table 17.2 IrDA Registers........................................................................................................ 560
Table 18.1 List of Multiplexed Pins ......................................................................................... 565
Table 18.2 Pin Function Controller Registers........................................................................... 569
Rev. 5.00, 09/03, page xli of xliv
RENESAS [ RENESAS TECHNOLOGY CORP ]
