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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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3.4  
TLB Functions  
3.4.1  
Unified TLB (UTLB) Configuration  
The unified TLB (UTLB) is so called because of its use for the following two purposes:  
1. To translate a virtual address to a physical address in a data access  
2. As a table of address translation information to be recorded in the instruction TLB in the event  
of an ITLB miss  
Information in the address translation table located in external memory is cached into the UTLB.  
The address translation table contains virtual page numbers and address space identifiers, and  
corresponding physical page numbers and page management information. Figure 3.7 shows the  
overall configuration of the UTLB. The UTLB consists of 64 fully-associative type entries. Figure  
3.8 shows the relationship between the address format and page size.  
Entry 0  
Entry 1  
Entry 2  
ASID [7:0] VPN [31:10]  
ASID [7:0] VPN [31:10]  
ASID [7:0] VPN [31:10]  
V
V
V
PPN [28:10] SZ [1:0] SH C PR [1:0] D WT SA [2:0] TC  
PPN [28:10] SZ [1:0] SH C PR [1:0] D WT SA [2:0] TC  
PPN [28:10] SZ [1:0] SH C PR [1:0] D WT SA [2:0] TC  
Entry 63 ASID [7:0] VPN [31:10]  
V
PPN [28:10] SZ [1:0] SH C PR [1:0] D WT SA [2:0] TC  
Figure 3.7 UTLB Configuration  
Rev. 6.0, 07/02, page 71 of 986  
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