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DG508ACJZA 参数 Datasheet PDF下载

DG508ACJZA图片预览
型号: DG508ACJZA
PDF下载: 下载PDF文件 查看货源
内容描述: [DG508ACJZA]
分类和应用: 光电二极管
文件页数/大小: 9 页 / 304 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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DG508A
Data Sheet
September 13, 2004
FN3137.5
CMOS Analog Multiplexers
The DG508A is a CMOS Monolithic 8-Channel Analog
Multiplexer, which can also be used as a demultiplexer. An
enable input is provided. When the enable input is high, a
channel is selected by the address inputs, and when low, all
channels are off.
A channel in the ON state conducts current equally well in
both directions. In the OFF state each channel blocks
voltages up to the supply rails. The address inputs and the
enable input are TTL and CMOS compatible over the full
specified operating temperature range.
The DG508A is pinout compatible with the industry standard
devices.
Features
• Low Power Consumption
• TTL and CMOS-Compatible Address and Enable Inputs
• 44V Maximum Power Supply Rating
• High Latch-Up Immunity
• Break-Before-Make Switching
• Alternate Source
Pb-free Available
[ /Title
(DG50
6A,
DG507
A,
DG508
A,
DG509
A)
/Sub-
ject
(CMO
S Ana-
log
Multi-
plex-
ers)
/Autho
r ()
/Key-
words
(Inter-
sil
Corpo-
ration,
semi-
con-
ductor,
Multi-
plexer,
Mux,
chan-
nel,
latched
,
video)
/Cre-
ator ()
Applications
• Data Acquisition Systems
• Communication Systems
• Signal Multiplexing/Demultiplexing
• Audio Signal Multiplexing
Ordering Information
PART NUMBER
DG508AAK
DG508ABK
DG508ACJ
DG508ACJZ
(See Note)
TEMP.
RANGE (
o
C)
-55 to 125
-25 to 85
0 to 70
0 to 70
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld PDIP
(Pb-free)
PKG.
DWG. #
F16.3
F16.3
E16.3
E16.3
A
2
X
0
0
0
0
1
1
1
1
A
1
X
0
0
1
1
0
0
1
1
Truth Table
DG508A
A
0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
ON SWITCH
None
1
2
3
4
5
6
7
8
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020C.
Pinout
DG508A (PDIP, CERDIP)
TOP VIEW
A
0
1
16 A
1
15 A
2
14 GND
13 V+
12 S
5
11 S
6
10 S
7
9 S
8
A
0
, A
1
, A
2
, EN
Logic “1” = V
AH
2.4V, Logic “0” = V
AL
0.8V
EN 2
V- 3
S
1
S
2
S
3
S
4
4
5
6
7
D 8
1
1-888-INTERSIL or 321-724-7143
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Intersil and Design is a trademark of Intersil Americas Inc.
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Copyright © Intersil Americas Inc. 2001, 2004