CD4051BMS, CD4052BMS, CD4053BMS
VDD
VDD
OUTPUT
OUTPUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RL
50pF
VEE
RL
50pF
VEE
VDD
VDD
VDD
VSS
VDD
VSS
CLOCK
IN
VEE
VSS
CLOCK
IN
VEE
VSS
VSS
VSS
tPHL AND tPLH
CD4052
tPHL AND tPLH
CD4051
OUTPUT
VDD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RL
50pF
VEE
VDD
VDD
VSS
CLOCK
IN
VEE
VSS
VSS
tPHL AND tPLH
CD4053
FIGURE 13. PROPAGATION DELAY - INHIBIT INPUT TO SIGNAL OUTPUT
DIFFERENTIAL
SIGNALS
CD4052
CD4052
COMMUNICATIONS
LINK
DIFF
DIFF
AMPLIFIER/
RECEIVER
LINE DRIVER
DIFF
DEMULTIPLEXING
MULTIPLEXING
FIGURE 14. TYPICAL TIME-DIVISION APPLICATION OF THE CD4052BMS
7-947
RENESAS [ RENESAS TECHNOLOGY CORP ]
