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7906 参数 Datasheet PDF下载

7906图片预览
型号: 7906
PDF下载: 下载PDF文件 查看货源
内容描述: 16位单片机 [16-BIT SINGLE-CHIP MICROCOMPUTER]
分类和应用: 计算机
文件页数/大小: 531 页 / 3056 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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APPENDIX  
Appendix 9. M37906M4C-XXXFP electrical characteristics  
Timer B input (Count input in event counter mode)  
Limits  
Symbol  
Parameter  
Unit  
Min.  
80  
Max.  
tc(TB)  
TBiIN input cycle time (one edge count)  
ns  
ns  
ns  
ns  
ns  
ns  
tw(TBH)  
tw(TBL)  
tc(TB)  
TBiIN input high-level pulse width (one edge count)  
TBiIN input low-level pulse width (one edge count)  
TBiIN input cycle time (both edge count)  
40  
40  
160  
80  
tw(TBH)  
tw(TBL)  
TBiIN input high-level pulse width (both edge count)  
TBiIN input low-level pulse width (both edge count)  
80  
Timer B input (Pulse period measurement mode)  
Symbol Parameter  
Limits  
Unit  
ns  
Min.  
16 × 109  
f(fsys)  
8 × 109  
f(fsys)  
8 × 109  
f(fsys)  
Max.  
tc(TB)  
TBiIN input cycle time  
f(fsys) 20 MHz  
f(fsys) 20 MHz  
f(fsys) 20 MHz  
(800)  
tw(TBH)  
tw(TBL)  
TBiIN input high-level pulse width  
TBiIN input low-level pulse width  
(400)  
(400)  
ns  
ns  
Note: The TBiIN input cycle time requires 4 or more cycles of a count source. The TBiIN input high-level pulse width and the TBiIN input low-level pulse width  
respectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f2 at f(fsys) 20 MHz.  
Timer B input (Pulse width measurement mode)  
Limits  
Symbol  
Parameter  
Unit  
ns  
Min.  
16 × 109  
f(fsys)  
8 × 109  
f(fsys)  
8 × 109  
f(fsys)  
Max.  
tc(TB)  
TBiIN input cycle time  
f(fsys) 20 MHz  
f(fsys) 20 MHz  
f(fsys) 20 MHz  
(800)  
(400)  
(400)  
tw(TBH)  
tw(TBL)  
TBiIN input high-level pulse width  
TBiIN input low-level pulse width  
ns  
ns  
Note: The TBiIN input cycle time requires 4 or more cycles of a count source. The TBiIN input high-level pulse width and the TBiIN input low-level pulse width  
respectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f2 at f(fsys) 20 MHz.  
Serial I/O  
Limits  
Symbol  
Parameter  
Unit  
Min.  
200  
100  
100  
Max.  
80  
tc(CK)  
CLKi input cycle time  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tw(CKH)  
tw(CKL)  
td(C-Q)  
th(C-Q)  
tsu(D-C)  
th(C-D)  
CLKi input high-level pulse width  
CLKi input low-level pulse width  
TXDi output delay time  
TXDi hold time  
0
20  
90  
RXDi input setup time  
RXDi input hold time  
7906 Group User’s Manual Rev.2.0  
20-114  
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