RESET
3.3 State of internal area
➀SFR area (Addresses 016 to FF16
)
Access characteristics
: It is possible to read the bit state at reading. The written value becomes valid.
: It is possible to read the bit state at reading. The written value becomes invalid.
: The written value becomes valid. It is impossible to read the bit state.
RW
RO
WO
: Nothing is assigned. It is impossible to read the bit state. The written value becomes invalid.
State immediately after reset
: “0” immediately after reset.
: “1” immediately after reset.
: Undefined immediately after
reset.
0
1
?
: Always “0” at reading.
0
1
?
0
: Always “1” at reading.
: Always undefined at reading.
: “0” immediately after reset. Fix this bit to “0.”
Address
Register name
Access characteristics
State immediately after reset
b7
b0
b7
b0
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
1016
1116
1216
1316
1416
1516
1616
1716
1816
1916
1A16
1B16
1C16
1D16
1E16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
(Note 1)
(Note 1)
?
?
?
(Note 2)
RW
?
Port P1 register
(Note 2)
RW
RW
(Note 2)
RW
(Note 2)
RW
?
0016
?
Port P1 direction register
Port P2 register
?
0016
?
Port P2 direction register
?
Port P4 register
Port P5 register
RW
RW
?
?
0
?
0
?
?
?
0
?
0
?
0016
RW
Port P4 direction register
Port P5 direction register
RW
?
?
0
RW
0
?
?
0016
0016
Port P6 register
Port P7 register
Port P6 direction register
Port P7 direction register
Port P8 register
RW
RW
RW
RW
RW
?
?
?
?
?
?
?
0
0
0
0
0
0
?
?
0
0
RW
Port P8 direction register
?
?
?
?
?
?
?
?
?
(Note 2)
(Note 2)
(Note 2)
(Note 2)
?
0
?
1
?
1
A-D control register 0
A-D control register 1
RW
RW
0
0
0
0
0
0
0
0
0
0
1F16
Notes 1: Do not read from and write to this register.
2: Do not write to this register.
Fig. 3.3.2 State of SFR and internal RAM areas immediately after reset (1)
7905 Group User’s Manual Rev.1.0
3-7