STOP AND WAIT MODES
15.2 Block description
15.2.3 Watchdog timer frequency select register
Figure 15.2.5 shows the structure of the watchdog timer frequency select register.
b7 b6 b5 b4 b3 b2 b1 b0
Watchdog timer frequency select register (Address 6116)
Function
Bit
0
Bit name
At reset R/W
Watchdog timer frequency
select bit
0 : Wf512
1 : Wf32
0
RW
5 to 1 Nothing is assigned.
Undefined
—
b7 b6
6
Watchdog timer clock source
select bits at STP termination
0
RW
0 0 : fX32
0 1 : fX16
1 0 : fX128
1 1 : fX64
0
RW
7
Fig. 15.2.5 Structure of watchdog timer frequency select register
(1) Watchdog timer clock source select bits at STP termination (bits 7, 6)
These bits are used to select a count source at stop mode termination.
For details of the operation at stop mode termination, refer to section “15.3 Stop mode.”
7905 Group User’s Manual Rev.1.0
15-7
RENESAS [ RENESAS TECHNOLOGY CORP ]
