SERIAL I/O
11.4 Clock asynchronous serial I/O (UART) mode
(Note 1)
[When using interrupts]
[When not using interrupts]
Checking completion of reception
A UARTi receive interrupt request
occurs when reception is completed.
UART0 transmit/receive control register 1 (Address 3516
UART1 transmit/receive control register 1 (Address 3D16
UART2 transmit/receive control register 1 (Address B516
)
)
)
UARTi receive interrupt
b7
b0
1
Receive complete flag
0 : Reception not completed
1 : Reception completed
Checking error
UART0 transmit/receive control register 1 (Address 3516
)
UART1 transmit/receive control register 1 (Address 3D16
)
UART2 transmit/receive control register 1 (Address B516
)
b0
b7
1
Framing error flag
Parity error flag
Error sum flag
0 : No error
1 : Error detected
Reading of receive data
UART0 receive buffer register (Addresses 3716, 3616
UART1 receive buffer register (Addresses 3F16, 3E16
UART2 receive buffer register (Addresses B716, B616
)
)
)
b15
0
b8 b7
b0
0
0 0 0 0 0
Read out receive data.
Checking error
UART0 transmit/receive control register 1 (Address 3516
UART1 transmit/receive control register 1 (Address 3D16
UART2 transmit/receive control register 1 (Address B516
)
)
)
b0
b7
1
Overrun error flag
0 : No overrun error
1 : Overrun error detected
Processing after reading out receive data
Notes 1: When performing the processing after the reception is completed, using an interrupt,
be sure to select the receive interrupt (UARTi receive interrupt mode select bit = “0”).
2: This figure shows the bits and registers required for the processing.
See Figure 11.4.13 for the change of flag state and the occurrence timing of an
interrupt request.
Fig. 11.4.11 Processing after reception is completed
7905 Group User’s Manual Rev.1.0
11-50
RENESAS [ RENESAS TECHNOLOGY CORP ]
