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16C26 参数 Datasheet PDF下载

16C26图片预览
型号: 16C26
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片16位CMOS微机 [SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER]
分类和应用: 计算机
文件页数/大小: 39 页 / 238 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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M16C/26 Group  
2. CPU  
2. Central Processing Unit (CPU)  
Figure 2.1 shows the CPU registers. The CPU has 13 registers. Of these, R0, R1, R2, R3, A0, A1 and FB  
comprise a register bank. There are two register banks.  
b31  
b15  
b8b7  
b0  
R2  
R3  
R0H(R0's high bits) R0L(R0's low bits)  
R1H(R1's high bits)R1L(R1's low bits)  
Data registers (Note)  
R2  
R3  
A0  
A1  
FB  
Address registers (Note)  
Frame base registers (Note)  
b19  
b15  
b0  
INTBH  
INTBL  
Interrupt table register  
Program counter  
The upper 4 bits of INTB are INTBH and  
the lower 16 bits of INTB are INTBL.  
b19  
b0  
b0  
PC  
b15  
USP  
User stack pointer  
Interrupt stack pointer  
Static base register  
ISP  
SB  
b15  
b0  
b0  
FLG  
Flag register  
b15  
b8 b7  
IPL  
U
I O B S Z D C  
Carry flag  
Debug flag  
Zero flag  
Sign flag  
Register bank select flag  
Overflow flag  
Interrupt enable flag  
Stack pointer select flag  
Reserved area  
Processor interrupt priority level  
Reserved area  
Note: These registers comprise a register bank. There are two register banks.  
Figure 2.1. Central Processing Unit Register  
2.1 Data Registers (R0, R1, R2 and R3)  
The R0 register consists of 16 bits, and is used mainly for transfers and arithmetic/logic operations. R1 to  
R3 are the same as R0.  
The R0 register can be separated between high (R0H) and low (R0L) for use as two 8-bit data registers.  
R1H and R1L are the same as R0H and R0L. Conversely, R2 and R0 can be combined for use as a 32-bit  
data register (R2R0). R3R1 is the same as R2R0.  
2.2 Address Registers (A0 and A1)  
The register A0 consists of 16 bits, and is used for address register indirect addressing and address regis-  
ter relative addressing. They also are used for transfers and logic/logic operations. A1 is the same as A0.  
In some instructions, registers A1 and A0 can be combined for use as a 32-bit address register (A1A0).  
Rev.1.00 2004.6.10 page 9 of 37  
REJ09B0176-0100Z