RTL8208B-LF/RTL8208BF-LF
Datasheet
Parameter
SYM Conditions
10Base-TX Receive System Timing
Min
Typical Max Units
From RXIP/N to
CRS_DV
Carrier Sense Turn-off
Delay
tCSON Preamble on RXIP/N to CRS_DV asserted
tCSOFF TP_IDL to CRS_DV de-asserted
tRXpd From RXIP/N to RXD[1:0]
-
-
12
8
-
9
Bits
Bits
Bits
RX Propagation Delay
9
-
12
LED Timing
LED On Time
LED Off Time
tLEDon While LED blinking
43
43
-
-
120
120
ms
ms
tLEDoff While LED blinking
Jabber Timing (10Base-T Only)
Jabber Active
Jabber de-assert
-
-
From TX_EN=1 to Jabber asserted
From TX_EN=0 to Jabber de-asserted
SMI Timing
60
60
70
-
80
80
ms
ms
MDC
-
-
-
-
MDC clock rate
Write cycle
Write cycle
Read cycle
-
-
-
-
-
2.5
-
-
MHz
ns
ns
MDIO Setup Time
MDIO Hold Time
MDIO output delay
relative to rising edge of
MDC
10
10
-
10
ns
9.5.1. RMII Receive Timing
Table 41. RMII Receive Timing
Symbol
Description
Minimum
Typical
Maximum
Units
T_opd_rxd_rmii
REFCLK rising edge to RXD/CRS_DV
delay.
4
-
9
ns
T_opd_rxd_rmii
REFCLK
RXD
Figure 23. RMII Receive Timing
Single-Chip Octal 10/100-TX/FX PHY Transceiver
53
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
