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RTL8208B-LF 参数 Datasheet PDF下载

RTL8208B-LF图片预览
型号: RTL8208B-LF
PDF下载: 下载PDF文件 查看货源
内容描述: [Network Interface]
分类和应用:
文件页数/大小: 65 页 / 1038 K
品牌: REALTEK [ Realtek Semiconductor Corp. ]
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RTL8208B-LF/RTL8208BF-LF  
Datasheet  
6.6. Register5: Auto-Negotiation Link Partner Ability  
This register contains the advertised abilities of the Link Partner as received during auto negotiation. The  
content changes after successful auto negotiation.  
Table 16. Register5: Auto-Negotiation Link Partner Ability  
Reg. bit Name  
Description  
Type  
Default  
5.15  
5.14  
5.13  
Next Page  
1: Link partner desires Next Page transfer  
0: Link partner does not desire Next Page transfer  
1: Link Partner acknowledges reception of FLP words  
0: No acknowledgement by Link Partner  
1: Remote Fault indicated by Link Partner  
0: No remote fault indicated by Link Partner  
Reserved.  
1: Asymmetric Flow control supported by Link Partner  
0: No Asymmetric flow control supported by Link Partner  
When auto-negotiation is enabled, this bit reflects Link  
Partner ability (read only).  
RO  
0
Acknowledge  
Remote Fault  
RO  
RO  
0
0
5.12  
5.11  
Reserved  
Asymmetric Pause  
RO  
RW  
0
0
In 100FX mode, this bit is set by FX_ASY_PAUSE or SMI.  
1: Flow control supported by Link Partner  
0: No flow control supported by Link Partner  
When auto-negotiation is enabled, this bit reflects Link  
Partner ability (read only).  
5.10  
Pause  
RW  
0
In 100FX mode, this bit is set by FX_PAUSE or SMI.  
1: 100Base-T4 supported by Link Partner  
0: 100Base-T4 not supported by Link Partner  
1: 100Base-TX full duplex supported by Link Partner  
0: 100Base-TX full duplex not supported by Link Partner  
For 100FX mode, this bit is set when Reg.0.8=1 or  
FX_DUPLEX =1.  
5.9  
5.8  
100Base-T4  
RO  
RO  
0
0
100Base-TX-FD  
When auto-negotiation is disabled, this bit is set when  
Reg.0.13=1 and Reg.0.8=1.  
5.7  
100Base-TX  
1: 100Base-TX half duplex supported by Link Partner  
0: 100Base-TX half duplex not supported by Link Partner  
For 100FX mode, this bit is set when Reg.0.8=0 or  
FX_DUPLEX =0.  
RO  
0
When auto-negotiation is disabled, this bit is set when  
Reg.0.13=1 and Reg.0.8=0.  
5.6  
5.5  
10Base-T-FD  
10Base-T  
1: 10Base-TX full duplex supported by Link Partner  
0: 10Base-TX full duplex not supported by Link Partner  
When auto-negotiation is disabled, this bit is set when  
Reg.0.13=0 and Reg.0.8=1.  
1: 10Base-TX half duplex supported by Link Partner  
0: 10Base-TX half duplex not supported by Link Partner  
When auto-negotiation disabled, this bit is set when  
Reg.0.13=0 and Reg.0.8=0.  
RO  
RO  
RO  
0
0
5.[4:0]  
Selector Field  
[00001]=IEEE 802.3.  
00001  
Note: The values are only guaranteed to be valid once auto-negotiation has successfully completed, as indicated by bit 5  
of the MII Status Register.  
Single-Chip Octal 10/100-TX/FX PHY Transceiver  
21  
Track ID: JATR-1076-21 Rev. 1.3  
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