RTL8201CL
Datasheet
8.2.5. MDC/MDIO Timing
Table 37. MDC/MDIO Timing
Symbol
Description
Minimum
160
Maximum
Unit
ns
ns
ns
ns
t1
t2
t3
t4
t5
t6
MDC high pulse width
MDC low pulse width
MDC period
MDIO setup to MDC rising edge
MDIO hold time from MDC rising edge
MDIO valid from MDC rising edge
160
400
10
10
0
ns
ns
300
t3
V
V
IH(min)
MDC
IL(max)
t5
t4
t1
t2
MDIO
sourced by
STA
V
IH(min)
V
IL(max)
t6
MDIO
sourced by
RTL8201CP
V
IH(min)
V
IL(max)
Figure 14. MDC/MDIO Timing
Transmission Without Collision
Figure 15 shows an example of a packet transfer from MAC to PHY.
Figure 15. MDC/MDIO MAC to PHY Transmission Without Collision
Single-Chip/Port 10/100 Fast Ethernet PHYceiver 29 Track ID: JATR-1076-21 Rev. 1.24
REALTEK [ Realtek Semiconductor Corp. ]
