WM710xx – Secure F-RAM with Gen-2 RFID
SUPPORTED COMMANDS
The WM710xx supports the following Select, Inventory, and Access commands as described in the
EPCglobal class 1 generation 2 UHF RFID Specification. Please refer to the referenced document for detailed
descriptions of these commands.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Select
Query
QueryAdjust
QueryRep
ACK
NAK
Req_RN
Read
Write
Kill
Lock
Access
BlockWrite *
BlockPermalock
MAXARIAS GEN2 CUSTOM COMMAND: BLOCKWRITE
The WM710xx supports a customized version of the BLOCKWRITE command to support unique features
within the device. The BLOCKWRITE command optional feature is enabled by asserting the BLKWREN
control bit in the Control/Status register to a logic one, after which the WM710xx will require a power cycle to
initialize itself. To support other features within the WM710xx, the BLOCKWRITE command uses the
address stored in the Working Stored Address register. The address pointer passed in the BLOCKWRITE
command is the physical address 0x3FFF (EBV formatted address = 0xF7FF), representing the same address
used for unaddressed write cycles. A single BLOCKWRITE command carries a maximum data payload of
127 words. BLOCKWRITE commands with data payloads greater than 127 words may optionally be written
to unlocked memory, however the WM710xx will not acknowledge the BLOCKWRITE command with a
success message. In this event, the host interrogator may perform one or more READ cycles to verify USER
memory data contents.
Prior to transmitting a BLOCKWRITE command, the interrogator must set the Working Stored Address
register through a standard Gen2 WRITE command. The BLOCKWRITE command is shown in Figure 8
below.
Figure 8. Block Write Syntax
BLOCKWRITE commands do not support the auto-increment feature used for UNADDR_WRITE commands.
As such, the Working Stored Address must be manually updated by the host interrogator and will not be
altered by a BLOCKWRITE command. When using the streaming capabilities of the BLOCKWRITE
command, care should be taken to consider the logic state of the AUTOINCR control bit. As with
UNADDR_WRITE commands, the Working Stored Address register is incremented prior to writing data to
memory when AUTOINCR=1 affecting the first USER memory address written to, as shown in Figure 9. The
figure depicts a BLOCKWRITE cycle of 8 words.
Rev. 1.2
Sept. 2010
Page 11 of 17
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
