FM25CL64B - 64Kb 3V SPI F-RAM
Serial Data Bus Timing
/Hold Timing
Power Cycle Timing
Power Cycle Timing (TA = -40° C to + 85° C, VDD = 2.7V to 3.65V unless otherwise specified)
Symbol
tPU
Parameter
Min
10
Max
Units
ms
Notes
VDD(min) to First Access Start
-
-
-
-
tPD
Last Access Complete to VDD(min)
VDD Rise Time
0
µs
tVR
tVF
Notes
30
100
1
1
µs/V
µs/V
VDD Fall Time
1. Slope measured at any point on VDD waveform.
Rev. 1.2
Feb. 2011
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