2.17 Wiring
Table 2.2 - Pin Listing
Applies to all devices
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
MOSI
MISO
SCK
/RST
Vdd
Vss
XT2
XT1
Rx
Tx
WS
SMP
Y3A
Y2A
Y1A
Y0A
Vdd
Vss
X0
X1
X2
X3
X4
X5
X6
X7
Vdd
Vss
Vdd
Y0B
Y1B
Y2B
Y3B
Y4A
Y4B
Y5A
Y5B
Vdd
Vss
LED
DRDY
Vref
S_Sync
/SS
I/O
I/O
O
I/O
I
P
P
O
I
I
O
I
I/O
I
I
I
I
P
P
O
O
O
O
O
O
O
O
P
P
P
I
I
I
I
I
I
I
I
P
P
O
O
I
O
I
Comments
SPI data input
SPI data output
SPI clock input
Reset low;
has internal 30K ~ 60K pull-up
Power, +5V
Supply ground
16 MHz 3-terminal resonator
UART receive data input
UART transmit data;
has internal 20K ~ 50K pull-up
Wake-up from sleep input and/or sync input
Sample output. Also - When forced high before
reset, induces ‘factory defaults’ into all setups.
Y line connection
Y line connection
Y line connection
Y line connection
Power, +5V
Supply ground
X matrix drive line
X matrix drive line
X matrix drive line
X matrix drive line
X matrix drive line
X matrix drive line
X matrix drive line
X matrix drive line
Power, +5V
Supply ground
Power, +5V
Y line connection
Y line connection
Y line connection
Y line connection
Y line connection
Y line connection
Y line connection
Y line connection
Power, +5V
Supply ground
Status output / LED indicator drive
1= Comms ready;
has internal 20K ~ 50K pull-up
0.05V nominal +/-10% via external divider
Scope Sync: Synchronization test signal
SPI slave select;
has internal 20K ~ 50K pull-up
If Unused, Connect To..
Leave open
Leave open
Leave open
Vdd
-
-
Leave open
-
Vdd
Leave open
Vdd
-
Leave open
Leave open
Leave open
Leave open
-
-
Leave open
Leave open
Leave open
Leave open
Leave open
Leave open
Leave open
Leave open
-
-
-
Leave open
Leave open
Leave open
Leave open
Leave open
Leave open
-
-
Leave open
-
-
Leave open
Leave open
lQ
9
QT60486-AS R8.01/0105
QUANTUM [ QUANTUM RESEARCH GROUP ]
