© Quantum Research Group Ltd.
3) When the sensor has the command echo or requested
data ready to send back to the host, it loads it into its SPI
Figure 4-4 Filtering SPI Slave-Only Connections
register and pulls DRDY’ low.
+5
+5
QT60xx5 Circuit
10K 10K
Host MCU
P_IN
4) The host detects that the sensor has pulled DRDY’ low
and in turn the host pulls SS’ low.
X drives
(1 of 8
shown)
DRDY
SS
Xn
Ra
Ca
220
5) The host obtains the byte from the sensor by transmitting
a dummy byte (0x00) to the sensor.
P_OUT1
SCK
47pF
Ra
Ra
Ra
Ra
Ca
Ca
SCK
MISO
6) The sensor releases DRDY’ to float high.
MISO
7) After the host detects that DRDY' has floated high the
host must allow SS’ to also float high.
Ca
Y Lines
(1 of 8
shown)
Yn
MOSI
MOSI
100
22pF
8) For multi-byte responses, steps (3) through (7) are
repeated until the return data is completely sent.
Ca
P_OUT2
RESET
1K
(MS not
shown)
1nF
The host must release the SS’ line in step (7) even between
multiple byte responses because the QT60xx5B waits for the
SS’ line to return high before signalling that the next byte is
ready for collection.
Figure 4-5 Filtering SPI Master-Slave Connections
+5
The host should check the DRDY’ line and wait for it to go
high before transmitting another byte. Until the DRDY’ line is
released the sensor is still processing a data return, even if
the complete response data has been fully transferred; the
sensor may still be busy when the host finishes the byte
transfer and may not be able to digest a new command
immediately.
QT60xx5 Circuit
10K
Host MCU
SS
X drives
(1 of 8
shown)
DRDY
SS
Xn
220
47pF
Ra
Ra
Ca
Ca
Ca
SCK
SCK
Ca
MISO
MISO
See Section 3.18, page 15, for a description of the Alert pin
which can be used to reduce communication traffic.
Y Lines
(1 of 8
shown)
Yn
MOSI
MOSI
100
22pF
Ra
1K
Ca
Ca
P_OUT
RESET
4.4 SPI Master-Slave Mode
(MS not
shown)
1nF
Refer to Figures 4-1 and 4-3. In Master-Slave mode the host
and sensor take turns being Master; the host always initiates
in Master mode during an exchange. The current Master
always controls all 3 signals. The sensor takes a variable
amount of time to respond to the host, depending on the
function and current and pending tasks. SPI Master/Slave
mode is selected by tying Pin 37 (MS) low via a 10K resistor.
Pin 37 is also an oscilloscope sync output (see Section
3.20 and command ^R, page 29) and should never be tied
directly to either supply rail. The host, like the sensor, must
idle in slave mode when not sending a command.
Recommended Values of Ra & Ca for Figures 4-4 and 4-5
SPI Clock Rate
1.5MHz
375kHz
Ra
680
Ca
100pF
270pF
470pF
1nF
1,000
2,200
2,200
93.75kHz
46.875kHz
enough to ensure adequate signal risetime and may need to
be augmented with external 10k pullups.
Master/Slave requires 3 signals to operate:
The host must wait until DRDY’ goes low before an SPI
transfer to retrieve data. For multi-byte responses, the host
must observe DRDY' to see when it goes high again after
each data byte, then low again, before executing another
transfer to get the next data byte. The host should send null
bytes (0x00) to retrieve data.
MOSI - Master out / Slave in data pin - bidirectional - an input
pin while the host is transmitting data; an output when the
sensor is transmitting data. The MOSI of the host and
slave should be tied together. The MISO lines are not used
on either part and should be left open.
If the DRDY’ line does not go low after a command, the
command was not properly received or it was inappropriate.
The delay to DRDY’ low depends on how many bytes of data
are being loaded into eeprom; Table 4-1. Absolute worst case
delays are found in Section 7; these timings occur only rarely,
for example if the device happens to be busy with adjacent
key suppression calculations, which occurs only at the
moment when a key is first detected.
SCK - SPI clock - bidirectional - an input pin when receiving
data; an output pin when sending. The host must shift out
data on the falling edge of SCK; the QT60xx5B clocks data
in on the rising edge of SCK. Important note: SCK from
the host must be low before asserting SS’ low or high at
either end of a byte or the transmission will fail. SCK
should idle low; if in doubt, a 10K pulldown resistor should
be used. When the sensor returns data it becomes the
Master; data is shifted out by it on the falling edge of SCK
and should be clocked in by the host on the rising edge.
A typical Slave-only function sequence is as follows:
1) The host pulls SS’ low, then transfers a command to the
sensor. The host then releases SS’ to float high. DRDY’ is
unaffected in this step.
SS’ - Slave select - bidirectional framing control. When the
sensor is in slave mode, this pin accepts the SS’ control
signal from the host. In either data direction, SS' must go
low before and any during data transfer; it should not go
high again until SCK has returned low at the end of a byte.
2) For 2-byte functions, (1) is repeated with a m50µs delay.
lQ
18
www.qprox.com QT60xx5B / R1.06
QUANTUM [ QUANTUM RESEARCH GROUP ]
