Internet Data Sheet
HYS72T[64/128/256]xx0HR–[3/3S/3.7/5]–A
Registered DDR2 SDRAM Modules
Product Type
Organization
512MB
1 GByte
1 GByte
2 GByte
×72
×72
×72
×72
1 Rank (×8) 1 Rank (×4) 2 Ranks (×8) 2 Ranks (×4)
Label Code
PC2– PC2– PC2– PC2–
5300R–444 5300R–444 5300R–444 5300R–444
JEDEC SPD Revision
Rev. 1.2
HEX
Rev. 1.2
HEX
Rev. 1.2
HEX
Rev. 1.2
HEX
Byte#
Description
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
t
t
t
WR.MIN [ns]
WTR.MIN [ns]
RTP.MIN [ns]
3C
1E
1E
00
00
39
69
80
18
22
0F
53
78
4F
2E
26
26
2B
1B
4A
20
23
C4
8C
68
94
3C
1E
1E
00
00
39
69
80
18
22
0F
53
78
4F
2E
26
26
2B
1B
4A
20
23
C4
8C
68
94
3C
1E
1E
00
00
39
69
80
18
22
0F
53
78
4F
2E
26
26
2B
1B
4A
20
23
C4
8C
68
94
3C
1E
1E
00
00
39
69
80
18
22
0F
53
78
4F
2E
26
26
2B
1B
4A
20
23
C4
8C
68
94
Analysis Characteristics
t
t
t
t
t
t
RC and tRFC Extension
RC.MIN [ns]
RFC.MIN [ns]
CK.MAX [ns]
DQSQ.MAX [ns]
QHS.MAX [ns]
PLL Relock Time
CASE.MAX Delta / ∆T4R4W Delta
T
Psi(T-A) DRAM
∆T0 (DT0)
∆T2N (DT2N, UDIMM) or ∆T2Q (DT2Q, RDIMM)
∆T2P (DT2P)
∆T3N (DT3N)
∆T3P.fast (DT3P fast)
∆T3P.slow (DT3P slow)
∆T4R (DT4R) / ∆T4R4W Sign (DT4R4W)
∆T5B (DT5B)
∆T7 (DT7)
Psi(ca) PLL
Psi(ca) REG
∆TPLL (DTPLL)
∆TREG (DTREG) / Toggle Rate
Rev. 1.31, 2006-11
38
03292006-21GC-MK06