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HYS64T256022EDL-2.5-B 参数 Datasheet PDF下载

HYS64T256022EDL-2.5-B图片预览
型号: HYS64T256022EDL-2.5-B
PDF下载: 下载PDF文件 查看货源
内容描述: 200针双芯片小外形- DDR2 -SDRAM模块 [200-Pin Dual Die Small-Outline-DDR2-SDRAM Modules]
分类和应用: 存储内存集成电路动态存储器双倍数据速率时钟
文件页数/大小: 40 页 / 2384 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet  
HYS64T256022EDL–[25F/2.5/3/3S/3.7]–B  
Small Outline DDR2 SDRAM Modules  
1.2  
Description  
The Qimonda HYS64T256022EDL–[25F/2.5/3/3S/3.7]–B  
module family are Small Outline modules “SO-DIMMs” with  
30 mm height based on DDR2 technology. DIMMs are  
available as non-ECC modules in 256M × 64 (2 GB)  
organization and density, intended for mounting into 200-pin  
connector sockets.  
The memory array is designed with stacked 1 Gbit Double-  
Data-Rate-Two (DDR2) Synchronous DRAMs. Decoupling  
capacitors are mounted on the PCB. The DIMMs feature  
serial presence detect based on a serial E2PROM device  
using the 2-pin I2C protocol. The first 128 bytes are  
programmed with configuration data and are write protected;  
the second 128 bytes are available to the customer.  
TABLE 2  
Ordering Information for RoHS Compliant Products  
Product Type1)  
Compliance Code2)  
Description  
SDRAM Technology  
PC2–6400  
HYS64T256022EDL–25F–B  
PC2–6400  
2GB 2R×8 PC2–6400S–555–12–D0  
2GB 2R×8 PC2–6400S–666–12–D0  
2GB 2R×8 PC2–5300S–444–12–D0  
2GB 2R×8 PC2–5300S–555–12–D0  
2GB 2R×8 PC2–4200S–444–12–D0  
2 Ranks, Non-ECC  
2 Ranks, Non-ECC  
2 Ranks, Non-ECC  
2 Ranks, Non-ECC  
2 Ranks, Non-ECC  
1 Gbit (×8)  
1 Gbit (×8)  
1 Gbit (×8)  
1 Gbit (×8)  
1 Gbit (×8)  
HYS64T256022EDL–2.5–B  
PC2–5300  
HYS64T256022EDL–3–B  
PC2–5300  
HYS64T256022EDL–3S–B  
PC2–4200  
HYS64T256022EDL–3.7–B  
1) All Product Type numbers end with a place code, designating the silicon die revision. Example: HYS64T256022EDL–3.7–B, indicating  
Rev. “B” dies are used for DDR2 SDRAM components. For all Qimonda DDR2 module and component nomenclature see Chapter 6 of  
this data sheet.  
2) The Compliance Code is printed on the module label and describes the speed grade, for example “PC2–4200S–444–12–D0”, where  
4200S means SO-DIMM modules with 4.26 GB/sec Module Bandwidth and “444–12” means Column Address Strobe (CAS) latency = 4,  
Row Column Delay (RCD) latency = 4 and Row Precharge (RP) latency = 4 using the latest JEDEC SPD Revision 1.2 and produced on  
the Raw Card “D”.  
TABLE 3  
Address Format  
DIMM Density Module  
Organization  
Memory ECC/  
# of  
SDRAMs  
# of row/bank/columns bits  
Raw Card  
Ranks  
Non-ECC  
2 GByte  
256M ×64  
2
Non-ECC  
16  
14/3/10  
D
TABLE 4  
Components on Modules  
Product Type1)  
DRAM Components1)  
DRAM Density  
DRAM Organisation  
2× 128M ×8  
Note  
2)  
HYS64T256022EDL  
1) Green Product  
HYB18T2G802BF  
2 ×1 Gbit  
2) For a detailed description of all functionalities of the DRAM components on these modules see the component data sheet.  
Rev. 1.0, 2006-11  
4
11172006-DXYK-2PPW  
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