欢迎访问ic37.com |
会员登录 免费注册
发布采购

HYS64T256022EDL-2.5-B 参数 Datasheet PDF下载

HYS64T256022EDL-2.5-B图片预览
型号: HYS64T256022EDL-2.5-B
PDF下载: 下载PDF文件 查看货源
内容描述: 200针双芯片小外形- DDR2 -SDRAM模块 [200-Pin Dual Die Small-Outline-DDR2-SDRAM Modules]
分类和应用: 存储内存集成电路动态存储器双倍数据速率时钟
文件页数/大小: 40 页 / 2384 K
品牌: QIMONDA [ QIMONDA AG ]
 浏览型号HYS64T256022EDL-2.5-B的Datasheet PDF文件第27页浏览型号HYS64T256022EDL-2.5-B的Datasheet PDF文件第28页浏览型号HYS64T256022EDL-2.5-B的Datasheet PDF文件第29页浏览型号HYS64T256022EDL-2.5-B的Datasheet PDF文件第30页浏览型号HYS64T256022EDL-2.5-B的Datasheet PDF文件第32页浏览型号HYS64T256022EDL-2.5-B的Datasheet PDF文件第33页浏览型号HYS64T256022EDL-2.5-B的Datasheet PDF文件第34页浏览型号HYS64T256022EDL-2.5-B的Datasheet PDF文件第35页  
Internet Data Sheet  
HYS64T256022EDL–[25F/2.5/3/3S/3.7]–B  
Small Outline DDR2 SDRAM Modules  
4
SPD Codes  
This chapter lists all hexadecimal byte values stored in the EEPROM of the products described in this data sheet. SPD stands  
for serial presence detect. All values with XX in the table are module specific bytes which are defined during production.  
TABLE 23  
SPD codes for HYS64T256022EDL–[25F/2.5/3/3S/3.7]–B  
Product Type  
Organization  
2 GByte 2 GByte 2 GByte 2 GByte 2 GByte  
×64  
×64  
×64  
×64  
×64  
2 Ranks 2 Ranks 2 Ranks 2 Ranks 2 Ranks  
(×8)  
(×8)  
(×8)  
(×8)  
(×8)  
Label Code  
PC2–  
6400S–  
555  
PC2–  
6400S–  
666  
PC2–  
5300S–  
444  
PC2–  
5300S–  
555  
PC2–  
4200S–  
444  
JEDEC SPD Revision  
Rev. 1.2 Rev. 1.2 Rev. 1.2 Rev. 1.2 Rev. 1.2  
Byte#  
Description  
HEX  
HEX  
HEX  
HEX  
HEX  
0
Programmed SPD Bytes in EEPROM  
Total number of Bytes in EEPROM  
Memory Type (DDR2)  
80  
08  
08  
0E  
0A  
71  
40  
00  
05  
25  
40  
00  
82  
08  
00  
80  
08  
08  
0E  
0A  
71  
40  
00  
05  
25  
40  
00  
82  
08  
00  
80  
08  
08  
0E  
0A  
71  
40  
00  
05  
30  
45  
00  
82  
08  
00  
80  
08  
08  
0E  
0A  
71  
40  
00  
05  
30  
45  
00  
82  
08  
00  
80  
08  
08  
0E  
0A  
71  
40  
00  
05  
3D  
50  
00  
82  
08  
00  
1
2
3
Number of Row Addresses  
Number of Column Addresses  
DIMM Rank and Stacking Information  
Data Width  
4
5
6
7
Not used  
8
Interface Voltage Level  
9
t
t
CK @ CLMAX (Byte 18) [ns]  
10  
11  
12  
13  
14  
AC SDRAM @ CLMAX (Byte 18) [ns]  
Error Correction Support (non-ECC, ECC)  
Refresh Rate and Type  
Primary SDRAM Width  
Error Checking SDRAM Width  
Rev. 1.0, 2006-11  
31  
11172006-DXYK-2PPW  
 复制成功!