Internet Data Sheet
HYS[64/72]T256020EU-[25F/2.5/3/3S/3.7]-B
Unbuffered DDR2 SDRAM Module
HYS[64/72]T256020EU–[25F/2.5]–B
,
HYS[64/72]T256020EU–[3/3S]–B
,
HYS[64/72]T256020EU–3.7–B
Revision History: 2006-10, Rev. 1.0
Page
Subjects (major changes since last revision)
Adapted internet edition
Updated Clock Load Tables and Notes of Block Diagrams
DD currents update
All
17–18
36–38
I
Previous Revision: 2006-09, Rev. 0.61
All
23
Qimonda update
Modified AC Timing Parameters
Previous Revision: 2006-08, Rev. 0.6
All
Updated for speed -5
43, 44
Added IDD Current Values for speed -3S and -3.7
Previous Revision: Rev. 0.5
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send your proposal (including a reference to this document) to:
techdoc@qimonda.com
qag_techdoc_rev400 / 3.2 QAG / 2006-08-07
10262006-SX8C-DEY8
2
QIMONDA [ QIMONDA AG ]
