Internet Data Sheet
HYS[64/72]T256020EU-[25F/2.5/3/3S/3.7]-B
Unbuffered DDR2 SDRAM Module
3.3
Timing Characteristics
This chapter describes the timing characteristics.
3.3.1
Speed Grade Definitions
All Speed grades faster than DDR2-DDR400B comply with DDR2-DDR400B timing specifications(tCK = 5ns with tRAS = 40ns).
Speed Grade Definition: Table 12 for DDR2–800, Table 13 for DDR2–667 and Table 14 DDR2–533C.
TABLE 12
Speed Grade Definition Speed Bins for DDR2–800
Speed Grade
DDR2–800D
DDR2–800E
Unit
Note
QAG Sort Name
CAS-RCD-RP latencies
–2.5F
–2.5
5–5–5
6–6–6
tCK
Parameter
Symbol
Min.
Max.
Min.
Max.
—
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
Clock Frequency
@ CL = 3
@ CL = 4
@ CL = 5
@ CL = 6
tCK
5
8
5
8
ns
ns
ns
ns
ns
ns
ns
ns
tCK
3.75
2.5
8
3.75
3
8
tCK
8
8
tCK
2.5
45
8
2.5
45
60
15
15
8
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
tRAS
tRC
tRCD
tRP
70000
—
70000
—
57.5
12.5
12.5
—
—
—
—
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are further guaranteed for normal
OCD drive strength (EMRS(1) A1 = 0)
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS, RDQS / RDQS,
input reference level is the crosspoint when in differential strobe mode.
3) Inputs are not recognized as valid until VREF stabilizes. During the period before VREF stabilizes, CKE = 0.2 x VDDQ is recognized as low.
4) The output timing reference voltage level is VTT
.
5) RAS.MAX is calculated from the maximum amount of time a DDR2 device can operate without a refresh command which is equal to 9 x tREFI
t
.
TABLE 13
Speed Grade Definition Speed Bins for DDR2–667
Speed Grade
DDR2–667C
DDR2–667D
Unit
Note
QAG Sort Name
CAS-RCD-RP latencies
–3
–3S
4–4–4
5–5–5
tCK
Parameter
Symbol
Min.
Max.
Min.
Max.
—
1)2)3)4)
1)2)3)4)
1)2)3)4)
Clock Frequency
@ CL = 3
@ CL = 4
@ CL = 5
tCK
tCK
tCK
5
3
3
8
8
8
5
8
8
8
ns
ns
ns
3.75
3
Rev. 1.0, 2006-10
17
10262006-SX8C-DEY8
QIMONDA [ QIMONDA AG ]
