Internet Data Sheet
HY[B/I]39SC256[80/16]0F[E/F]
256-MBit Synchronous DRAM
TABLE 11
IDD Specifications and Conditions
Symbol
Test Condition
RC = tRC(min), IO = 0 mA
–6
–7
Unit
Note 1)
2)3)
IDD1
t
100
2
80
2
mA
mA
mA
mA
mA
mA
mA
mA
mA
1)
IDD2P
IDD2N
IDD3N
IDD3P
IDD4
CS =VIH (min.), CKE ≤VIL(max)
CS =VIH (min.), CKE≥ VIH(min)
CS = VIH(min), CKE ≥VIH(min.)
CS = VIH(min), CKE ≤ VIL(max.)
—
1)
26
40
5
22
35
5
1)
1)
1)3)
4)
65
168
25
3
57
142
25
3
IDD5
t
t
RFC= tRFC(min)
RFC= 15.6 µs
IDD6
—
1)
2) These parameters depend on the cycle rate. All values are measured at 133 MHz for -7 with the outputs open. Input signals are changed
once during tCK
VSS = 0 V; VDD, VDDQ = 3.3 V ± 0.3 V, TA see Table 7
.
3) These parameters are measured with continuous data stream during read access and all DQ toggling. CL=3 and BL=4 is assumed and
the VDDQ current is excluded.
4)
tRFC= tRFC(min) “burst refresh”, tRFC= 15.6 µs “distributed refresh”.
Rev. 1.25, 2007-06
15
03062006-NMGU-CQ9D
QIMONDA [ QIMONDA AG ]
